JVC AX-Z1010TN - Block Diagrams; Digital Signal Processing Circuit; Analog Signal Processing Circuit

Block Diagrams
@ Digital Signal Processing Circuit
OPTICAL MSB ADJUSTMENT
RECEIVER R203. ROS
MODULE DELAY DIRCUIT & DIGITAL FILTER
1 r0p-b02e? (etos K2 INTERFACE 16-8IT D/A CONVERTER
cep/cpv J104 [nore Pr
(OPTICAL) TORK172 26) ic106 27 7 10113
YM3623B YM3414
1 5
5
Ici01 C104 nego ‘CURRENT
eo 5Kos 9Ko8 @ ADDITION
ct o-| > ~~ LOW PASS FILTER — — i
tc203. 1c20a 1 MUTING
[oreo 9267. G268 -————
0269. G270
t 2 43] 12
cpcay) © 1>é- p> +
DAT
43 19411
cree) © <8]
@ Analog Signal Processing Circuit
oG-—-83
Lines G-—_-—Bs-4
Linez Q-———-Bst- 4
LINES
(PLAY)
DATI/TAPEL
crec) GB}
MUTING
(PLAY) (Ce
DAT2/TAPE2
c
I
t
I
SAMPLE HOLD !
1C203. 16204 :
_DEGLITCHER 77 }
G201, G202 t
I
t
I
t
t
|
10405. 1C406
(rec) G--—--—-—++
re
DAC OUT
AX-Z1010TN
pial haes
(No. 20115}