2-14
2.3.3 EIS (Electric Image Stabilizer) control
The accurate compensation without picture quality deterioration is possible by using CCD with expansion
area and correcting it two times.
CCD
CDS / AGC /
ADC
IWD FMC
VRAM
TG/
V_DRIVER
CPU
13.5 MHz18 MHz
Vector
(1) (2)
(3)
(4)
DSP
Fig. 2-3-8 EIS system block diagram
962
654(*774)
800
240(*288)
720
245(*292)
(1) Cutting out at TG (2) Cutting out at IWD
(3) Cutting out at Field Memory (4) Camera output
2 lines mixing transfer
Fig. 2-3-9 EIS operation
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