JVC SR-DVM700EU - Page 53

A
1
2
3
4
5
BCD EFG
IC1201
CN1202
B1205
TL1216
UART2_RX
UART2_TX
IC1202
IC1203
MADD[1-5]
EPG_INT[L]
B1203
B1206
R1227
R1228
RA1203
GND
R1221
R1220
R1219
R1218
R1217
C1207
C1206
WAIT[L]
C1208
CS[3]
TL1217
DTACK[L]
B1207
MADD[22]
B1208
TL1215
RA1202
R1222
D3.3V
K1201
C1204
R1216
R1223
RA1201
B1204
R1225
B1202
C1241
CS[0]
CS[1]
C1245
E5_RESET[L]
R1224
R1226
C1246
C1247
C1203
R1261
ALE
IC1241
R1253
R1258
UWE[L]/UDS[L]
ELINK_INT[L]
MADD[6-21]
RA1204
R1260
RD/WR[L]
OE[L]/LDS[L]
R1259
C1259 C1254
X1241
R1252
C1256
C1255
R1250
C1257
R1254
C1262
C1260
C1261
K1242
K1243
R1249
Q1244
GND
R1248R1247
Q1243
Q1242
R1246R1245 C1244C1243R1244
R1242
R1241
R1243
Q1241
EPG_V_IN
D5.0V
K1241
C1242
TL1241
R1229 R1230 R1231
R1257
C1258
RA1243 RA1242 RA1241
R1256 R1255
R1251
C1249 C1253
C1248 C1250
C1251 C1252
p10659001a_rev0
Flash-ROM section
TO SHEET 4
TO SHEET 4
TO SHEET 2
NOT USED
SHEET 3
2-9 2-10