JVC XV-M565BK - Page 60

XV-M565BK/M567GD
1-60
Pin No.
Symbol
I/O
Function
ZIVA3-PEO (5/5)
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
I
I/O
O
I
-
-
-
I
-
I
-
I
I
I
I
I
I
I
DVD DATA4
DVD DATA5
DVD DATA6
DVD DATA7
TEST PIN10
V REQUEST
V STROBE
i vdd
A REQUEST
i vss
V DACK
E VDD
SECT-SYNC
E VSS
ERROR
HOST8 SEL
HADDR0
HADDR1
HADDR2
DTACK SEL
CS
R/W
RD
DVD parallel compressed data from DVD DSP. When DVD DSP sends 32-bit words, it must write
the MSB first.
Programmable I/O pins. Input mode after reset.
Video request. Decoder asserts VREQUEST to indicate that the video input buffer has available
space.Polarity is programmable.
Video strobe. Programmable dual mode pulse. Asynchronous and synchronous. In Asynchronous
mode, an external source pulses VSTROBE to indicate data is ready for transfer. In synchronous
mode VSTROBE clock data.
3.3-V supply voltage for I/O signals.
Connected to TP539
Ground for core logic and I/O signals.
In synchronous mode, Video data acknowledge. Asserted when DVD data is valid.Polarity is
programmable.
2.5-V supply voltage for core logic.
Host write
Ground for core logic and I/O signals.
Error in input data. If ERROR signal is not available from the DSP it must be grounded.
Always Ttie to VDD-3.3
Host address bus. 3-bit address bus selects one of eight host interface registers.
Tie HIGH to select WAIT signal, LOW to select DTACK signal (Motorola 68K mode).
Host chip select.Host asserts CS to select the decoder for a read or write operation.The falling
edge of this signal triggers the read or write operation.
Read/write strobe in M mode. write strobe in l mode.Host asserts R/W LOW to select write and
LOW to select read.
Read strobe in I mode. Must be held HIGH in M Mode