2400 Series SourceMeter
®
User’s Manual Status Structure 15-13
Figure 15-5
Operation event status
Measurement Event Register
The used bits of the Measurement Event Register (shown in Figure 15-6) are described as
follows:
• Bit B0, Limit 1 Fail (L1) — Set bit indicates that the Limit 1 test has failed.
• Bit B1, Low Limit 2 Fail (LL2) — Set bit indicates that the Low Limit 2 test has
failed.
• Bit B2, High Limit 2 Fail (HL2) — Set bit indicates that the High Limit 2 test has
failed.
• Bit B3, Low Limit 3 Fail (LL3) — Set bit indicates that the Low Limit 3 test has
failed.
• Bit B4, High Limit 3 Fail (HL3) — Set bit indicates that the High Limit 3 test has
failed.
• Bit B5, Limits Pass (LP) — Set bit indicates that all limit tests passed.
• Bit B6, Reading Available (RAV) — Set bit indicates that a reading was taken and
processed.
Swp
(B3)
—
(B2)
—
(B1)
Cal
(B0)
—
(B4)
Trig
(B5)
Arm
(B6)
—
(B9 - B7)
Idle
(B10)
—
(B15 - B11)
Operation
Condition Register
Operation
Event Register
Operation Event
Enable Register
&
&
&
&
&
OR
To Operation
Summary Bit
(OSB) of Status
Byte Register.
(See Figure 15-3.)
:stat:oper:cond?
Swp
(B3)
—
(B2)
—
(B1)
Cal
(B0)
—
(B4)
Trig
(B5)
Arm
(B6)
—
(B9 - B7)
Idle
(B10)
—
(B15 - B11)
Swp
(B3)
—
(B2)
—
(B1)
Cal
(B0)
—
(B4)
Trig
(B5)
Arm
(B6)
—
(B9 - B7)
Idle
(B10)
—
(B15 - B11)
Idle = In idle state
Arm = Waiting for arm event
Trg = Waiting for trigger event
Swp = Sweeping
Cal = Calibrating
& = Logical AND
OR = Logical OR
:stat:oper?
:stat:oper:enab<NRf>
:stat:oper:enab?
Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com
To Next Page
Loading...
Need help?
General
