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Korg ddd-1 Service Manual

Korg ddd-1
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10.
VCF-VCA
+
AMP.
(output
amplifier)
The
de-emphasized
signal
is
input
to
the
VCF
inside
IC19
(NJM2069)
and
high-cut;
fc,
at
this
time
is
con
trolled
by
the
analogue
data
formed
by
D/A
conver
ting
the
control
signal
from
DDD-1
through
PAO
to
PA7
of
IC17
(82C55).
The
range
of
variation
is
9
kHz
to
40
kHz.
In
addition,
in
the
VCA
inside
the
same
IC
the
output
level
from
IC19
is
controlled
by
analogue
data
formed
by
D/A
conversion
of
the
DDD-1
control
signal
that
has
passed
through
PBO
to
PB5
of
IC17.
SW1
and
VR1
which
are
attached
to
IC19
are
used
to
adjust
the
fc
of
the
built-in
VCF.
For
the
detailed
ad
justment
method
refer
to
the
calibration
and
specifications
manual.
The
signal
output
from IC19
passes
through
the
output
amplifier
formed
by
IC15,
and
then
is
output
to
SIG
OUT
of
DDD-1.
11.
VCO:
CLOCK
CIRCUIT
This
circuit
performs
clock
control
of
the
gate
array
(IC7).
This
control
varies
the
timing
inside
the
gate
ar
ray,
changing
the
time
for
reading
data
from
memory
and
the
frequency
of
the
sampling
clock
that
is
out
put.
As
a
result,
the
frequency
(tune)
of
the
DSB-1
output
signal
can
be
varied.
The
circuit
is
an
oscillator
consisting
of
the
pair
tran
sistor
Q1,
74HC00
(IC/2)
and
transistor
Q3.
By
apply
ing
a
linear
control
voltage
to
the
pair
transistor,
the
oscillator
is
varied
exponentially.
Since
the
musical
scale
varies
exponentially,
by
control
of
this
circuit
musical
intervals
can
be
added
to
the
output
signal.
The
linear
control
voltage
for
the
pair
transistor
is
analogue
data
formed
by
D/A
conversion
of
the
DDD-1
control
signal
output
through
PAO
to
PA7
of
IC17
(82C55).
The
oscillator
output
frequency
varies
within
the
range
of
740
kHz
to
3.2
MHz.
This
range
can
be
adjusted
by
VR2,
3
and
4.
12.
D-RAM
IC8,
IC13,
IC14,
IC16,
IC18, IC21,
IC22
and
IC24
are
64
K
bit
dynamic
CMOS
RAMs;
specifically,
they
are
/iPD4265
which
are
capable
of
being
backed
up
by
batteries.
There
are
4
bits
worth
of
I/O
ports
for
the
memory
but
this
memory
has
only
1
bit
of
I/O,
so
there
are
4
totaling
64k
words.
Consequently,
this
cir
cuit
which
uses
8
has
4
bits
x
64k
words
x
2
blocks
=
128k
words.
126
bits
(3
words)
are
used
for
1
sampling,
which
makes
43690
words/12
bits.
When
the
sampling
frequency
is
taken
to
be
23.1
kHz,
the
maximum
delay
time
of
1891
msec
is
obtained.
Of
the
2
blocks,
BLOCK
1
uses
IC13
as
the
LSB
and
also
has
IC16,
IC21
and
IC23
in
that
order,
while
BLOCK
2
uses
IC8
is
the
LSB
and
has
IC14,
IC18
and
IC22
in
that
order.
13.
BLOCK
CHANGE
&
GATE
CIRCUIT
As
was
discussed
in
section
12,
the
memory
is
divid
ed
into
2
blocks.
The
control
signal
from
DDD-1
is
output
to
PC3
of
IC17
(82C55)
and
controls
IC3
(74HC157)
which
is
used
for
BLOCK
selection,
selec
ting
either
BLOCK
1
or
BLOCK
2.
If
the
output
from
PC3
of
IC17
is
"L",
reading
from
and
writing
into
BLOCK
1
can
be
done
by
OE0
or
WEO.
Also
if
"H"
is
output
to
PC2
of
IC17
(which
is
normally
"L"),
making
PC3
"L",
reading
from
and
writing
into
BLOCK
1
can
30
be
done
by
OE0
or
WE0t
and
continuous
(128k
words)
reading
from
and
writing
into
BLOCK
2
can
be
done
by
OE1
or
WE1.
(PC2
"H" and
PC3
"H"
are
prohibited
by
the
software.
The
gate
circuit
consists
of
the
three-state
buffer
consisting
of
74HC241
(IC4)
and
74HC244
(IC5),
plus
HD14572
(IC2).
IC4
opens
the
gate
to
either
the
BLOCK
1
or
BLOCK
2
read-out
path
as
selected
by
IC
3.
The
BLOCK
read-out
path
gates
are
constantly
alternated
while
the
power
to
DDD-1
is
ON.
Both
gates
are
never
open
at
once,
but
when
the
power
to
DDD-1
is
OFF
both
are
closed.
The
IC5
gate,
due
to
the
way
it
is
coordinated
with
IC4,
is
always
closed
when
the
power
to
DDD-1
is
OFF
or
when
read-out
from
memory
is
in
progress.
14.
BATTERY
(battery
back-up
circuit)
When
the
power
to
DDD-1
is
ON,
DSB-1
is
operated
by
the
power
supply
voltage
supplied
from
DDD-1.
When
the
power
is
OFF,
only
the
memory
and
peripheral
circuits
are
operated
by
the
voltage
from
the
battery,
so
that
the
contents
of
memory
are
preserved.
Switching
between
the
two
modes
is
done
by
transistor
Q2.
15.
VOLTAGE
REGULATOR
(stabilized
power
supply
circuit)
Inside
DSB-1
a
stable
voltage
is
produced
and
sup
plied
by
IC6
(7805)
so
that
the
circuits
related
to
VCO
will
not
be
affected
by
fluctuations
in
the
DDD-1
power
supply
voltage.
16.
DSB-1
CONTROLLER:
82C55
The
DDD-1
data
bus
writes
control
data
directly
into
DO
to
D7
of
IC17
(82C55).
These
data
are
output
to
PORT
A
through
PORT
C,
and
control
DSB-1.
(However,
data
are
read
into
the
data
bus
side only
in
PC4).
Scan by Manual Manor
http://www.markgllinsky.com/ManualManor.html

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Korg ddd-1 Specifications

General IconGeneral
BrandKorg
Modelddd-1
CategoryDrums
LanguageEnglish

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