Korg DSS-1 - Page 53

1
i
CMOS DATA SEPARATOR SED 9420C
■ BLOCK DIAGRAM
RDDATAI
iiii
oooo
illj
OSC1
OCS2
SYNC field
detection circuit
DO
Digital
one-shot
circuit
o
S
If
Frequency
divider circuit
Phase
comparator
and charge
pump
Voltage
control
oscillaror
(VCO)
std;
FM:
I
Offset
voltage
generator
circuit
16MHz:
4MHz:
Frequency
divider circuit
FEED BACK
(WN or WIND)
Switching timing
detection circuit
Input switching I—p
DT si9nal |
WN
WIND
Data output
circuit
ill
Timer
circuit
-OCR
PIN CONFIGURATION
SED 9420C
O— 10SC1 24 VM —O
O— 2 0SC2 23TM0UT —O
O— 3CLK1 22 TRIG IN —O
O— 4 TEST 2 21 CLK2 —O
O— 5NC 20 CR —O
O— 6 SYNC 19WCLK —O
O— 7RDDATA 18 TEST 1 —O
O— 8 WINDOW 17 LPF2 —O
O— 9 DATA 16LPF1 —O
O— 10MFM/FM 15 OFFSET —Q-
O— 11 MIN/STD 14 CONTROL —O
O— 12 VW1 13 V^ _O
51
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