EasyManua.ls Logo

LabJack UE9 - Page 19

LabJack UE9
86 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
For example, the Series 1 (D12/D24) or Series T (TD12/TD24) relays from Crydom specify a max turn-on of 3.0 volts, a min turn-
off of 1.0 volts, and a nominal input impedance of 1500 Ω.
When the digital line is set to output-low, it is the equivalent of a ground connection with 180 Ω (EIO/CIO/MIO) or 550 Ω (FIO)
in series. When using an EIO/CIO/MIO line, the resulting voltage across the control inputs of the relay will be about
5*1500/(1500+180) = 4.5 volts (the other 0.5 volts is dropped across the internal resistance of the EIO/CIO/MIO line). With
an FIO line the voltage across the inputs of the relay will be about 5*1500/(1500+550) = 3.7 volts (the other 1.3 volts are
dropped across the internal resistance of the FIO line). Both of these are well above the 3.0 volt threshold for the relay, so it
will turn on.
When the digital line is set to input, it is the equivalent of a 3.3 volt connection with 100 kΩ in series. The resulting voltage
across the control inputs of the relay will be close to zero, as virtually all of the 1.7 volt difference (between VS and 3.3) is
dropped across the internal 100 kΩ resistance. This is well below the 1.0 volt threshold for the relay, so it will turn off.
When the digital line is set to output-high, it is the equivalent of a 3.3 volt connection with 180 Ω (EIO/CIO/MIO) or 550 Ω
(FIO) in series. When using an EIO/CIO/MIO line, the resulting voltage across the control inputs of the relay will be about
1.7*1500/(1500+180) = 1.5 volts. With an FIO line the voltage across the inputs of the relay will be about
1.7*1500/(1500+550) = 1.2 volts. Both of these in the 1.0-3.0 volt region that is not defined for these example relays, so the
resulting state is unknown.
Mechanical relays require more control current than SSRs, and cannot be controlled directly by the digital I/O on the UE9. To
control higher currents with the digital I/O, some sort of buffer is used. Some options are a discrete transistor (e.g. 2N2222), a
specific chip (e.g. ULN2003), or an op-amp.
Note that the UE9 DACs can source enough current to control almost any SSR and even some mechanical relays, and thus can be
a convenient way to control 1 or 2 relays.
The RB12 relay board is a useful accessory available from LabJack. This board connects to the DB15 connector on the UE9 and
accepts up to 12 industry standard I/O modules (designed for Opto22 G4 modules and similar).
Another accessory available from LabJack is the LJTick-RelayDriver. This is a two channel module that plugs into the UE9 screw-
terminals, and allows two digital lines to each hold off up to 50 volts and sink up to 200 mA. This allows control of virtually any solid-
state or mechanical relay.
2.10 - Timers/Counters
The UE9 has 6 timers (Timer0-Timer5) and 2 counters (Counter0-Counter1). When any of these timers or counters are enabled,
they take over an FIO line in sequence (Timer0, Timer1, …, Timer5, Counter0, Counter1). If any one of the 8 timers/counters is
enabled, it will take over FIO0. If any 2 are enabled, they will take over FIO0 and FIO1. If all 8 are enabled, they will take over all 8
FIO lines. Some examples:
1 Timer enabled, Counter0 disabled, Counter1 disabled
FIO0=Timer0
1 Timer enabled, Counter0 disabled, Counter1 enabled
FIO0=Timer0
FIO1=Counter1
6 Timers enabled, Counter0 enabled, Counter1 enabled
FIO0-FIO5=Timer0-Timer5
FIO6=Counter0
FIO7=Counter1
Timers and counters can appear on various pins, but other I/O lines never move. For example, Counter1 can appear anywhere
from FIO0 to FIO7, depending on how many timers are enabled and whether Counter0 is enabled.
Applicable digital I/O are automatically configured as input or output as needed when timers and counters are enabled, and stay
that way when the timers/counters are disabled.
See Section 2.9.1 for information about signal connections.
Each counter (Counter0 or Counter1) consists of a 32-bit register that accumulates the number of falling edges detected on the
external pin. If a counter is reset and read in the same function call, the read returns the value just before the reset.
Counter1 is used internally by stream mode, but in such a case only uses an FIO line if clock output or external triggering is used. If
any timers/counters are being used while starting/stopping a stream, the possible interaction between timer/counter configuration
and starting/stopping a stream needs to be considered.
The timers (Timer0-Timer5) have various modes available:
19