ECP5 Face Identification Quick Start Guide
Application Note
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All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-AN-02010-1.0 5
1. Introduction
This document provides a quick guide on how to train a machine and create a frozen file for the Lattice Machine
Learning development using the Lattice’s Embedded Vision Development Kit. It assumes that the reader is familiar with
the basic Lattice FPGA design flow and mainly focuses on the Machine Learning part of the overall development
process. For detailed instructions of the design flow described in this document, refer to the ECP5-Face-Identification-
Reference-Design (FPGA-RD-02062).
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