Lexicon MPX-1 User Manual

STANDARD SOFTWARE SUPPLIED WITH HPX-l
The
HPX-l is supplied wi th an EPROM that contains some general purpose
utility routines. It contains code to initialize the interrupt controllers (to
a benign state). several useful subroutines and a general purpose command
interpreter that implements a "channel protocol". Included are several built-in
commands to perform useful tasks such as loading and executing programs from
system memory. changing the interrupt controller parameters and block memory
moves on system RAM. The command structure includes a sophisticated "link"
protocol that allows chaining of command sequences and recursion.
Note that no representation is made that this is the most efficient way to
program or use an MPX board. Rather. it is intended as partly tutorial and
partly a useful way to get "up and running" with the MPX in a minimum amount of
time.
What follows is a discussion of the basic command structure and then
descriptions of the actual commands. Following that is a discussion of the code
itself that explains how to add custom commands and describes several useful
subroutines.
BASIC COMMAND STRUCTURE AND PROTOCOL
When the MPX-1 powers up. it masks all its interrupt inputs, does some
internal initialization and waits quietly for an ATTN on its ATTN port. When it
receives an ATTN it will read in 16 bytes from the system memory starting at
address 50 hex. The meaning of the bytes follows:
Byte 0:
Byte 1:
Byte 2:
Byte 10:
Byte 11:
Byte 12:
Byte 13:
Byte 14:
Byte 15:
Opcode Byte
Status Indication Byte
General Purpos~,Parameter Byte 0
General Purpose Parameter Byte 8
Link Address (least significant byte)
Link Address
Link Address (most significant byte)
Result 1 byte
Result 2 byte
The following is a more detailed description of the bytes shown above:
OPCODE BYTE
The opcode byte contains the information that tells the MPX what command to
execute. and also contains two bits that control the completion interrupt and
link structures. T~e actual bit coding of the opeode byte is shown below:
Bit 7
Bit 0
---------------------------------------------------------------
CONT I
INT I o
I BIT 4 I BIT 3 I BIT 2 I BIT 1 I BIT 0 I
---------------------------------------------------------------
12

Lexicon MPX-1 Specifications

General

A/D Conversion	24-bit
D/A Conversion	24-bit
Sampling Rate	44.1 kHz
Dynamic Range	> 100 dB
Effects	Reverb, Delay, Chorus, Flange, Pitch Shift
Inputs	2 x 1/4" TRS
Outputs	2 x 1/4" TRS
MIDI	In, Out
Control	Front panel controls, MIDI
Power Supply	AC adapter (included)
Frequency Response	20 Hz - 20 kHz
Dimensions	19" x 1.75"
Type	Dual Channel Multi-Effects Processor
Presets	200 (100 Factory, 100 User)
Total Harmonic Distortion	<0.01% (20Hz-20kHz)

Summary

MPX-1 Hardware and Usage

Local Address Map

Defines memory and I/O address assignments on the MPX-1 board.

Accessing Memory and I/O Ports

Explains how the MPX-1 accesses external memory and I/O devices.

System Interaction and Attention Signals

Details how the MPX-1 gets attention and signals the system CPU.

Hardware Settings and Jumpers

Covers switch settings, jumper options, and port address selection.

RAM and EPROM Configuration

Instructions for selecting and configuring RAM and EPROM chips.

MPX-1 Software and Command Protocol

Standard Software Supplied

Describes the utility routines and command interpreter provided with the MPX-1.

Basic Command Structure

Explains the fundamental structure and protocol for MPX-1 commands.

Command Data Bytes (Opcode, Status, Parameters)

Details the meaning and function of opcode, status, and parameter bytes.

Link Address and Result Bytes

Describes the purpose of link address and result bytes in command execution.

MPX-1 Command Descriptions

Basic Operation Commands (NOP, SET MASK)

Explains commands for no operation and interrupt masking.

Interrupt Control Commands

Covers commands for EOI, reading registers, and setting response.

Memory and System Commands

Details commands for determining size, loading RAM, and executing programs.

Block Move Commands

Describes commands for moving blocks of RAM on the system bus.

Reserved and Other Commands

Information on reserved opcodes and other command types.

MPX-1 Theory of Operation

MPX Architecture and Bus Interface

Explains the MPX design using the Intel 8085 and its S-100 bus interface.

Bus Cycle Operation Details

Details the operation of bus cycles, DMA, and signal timing.

Intel 8259A Interrupt Controller

Introduction and Concepts

Introduces the 8259A PIC, its features, and interrupt servicing methods.

8259A Modes and System Integration

Describes 8259A modes and its use in MCS-80/85 and MCS-86/88 systems.

Interrupt Registers and Logic

Explains the IRR, ISR, IMR, and priority resolver logic.

Interrupt Priorities and Modes

Details interrupt priority schemes and modes like Fully Nested.

Interrupt Status and Control

Covers reading interrupt registers and poll command functionality.

Interrupt Cascading and Programming

Explains interrupt cascading, special modes, and 8259A programming.

MPX-1 Schematics and Parts List

MPX Multiplexer Channel Schematics

Provides circuit diagrams for the MPX multiplexer channel.

MPX-1 Parts List

Lists the semiconductor and electrical components used in the MPX-1.

Customer Support and Warranty

Customer Service Information

Provides contact information for customer service and technical assistance.

Limited Warranty Information

Outlines the terms and conditions of the product's limited warranty.