OCW3
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Do
OCW3 is used
to
issue various modes and Commands to
the 8259A. There are
two
main categories
of
operation
associated
with
OCW3: interrupt
status
and interrupt
masking,
Bit
definition
of OCW3 is as follows:
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1·-/
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REGISn::R
COMUIANO
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...
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iO.\as,t
ltI.lHU
1 " POLL
CoM~JlNO
o =NO
POll
COMMAND
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sa
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I
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,
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tIiIO
aC1lQllll
fllU'
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....
.
...
RIS: The
RIS
bit
is
used to select the
\SR
or IRR for
the read register command. If
RIS
is set
to
1,
ISR is selected, If
RIS
is
0,
IRR
is selected. The
state
of
the RIS is only honored
if
the
RR
bit
is
a
1.
RR:
The
RR
bit
is used
to
execute the read register
command.
If
RR
is set
to
a
1,
the read register
command
is
issued and
t.he
state
of
RIS deter-
mines
the register
to
be read. If
RR
is
0,
the
read register
cOJTlmand
isn't
issued.
P:
The P
bit
is used
to
issue the
poll
command.
If
P
is
set
to
a
1,the
poll command
is
issued. If
it
is
0,
the
poll command
isn't
issued. The poll
command
will
override a read register com·
mand
if
set simultaneously.
SMM: The SMM
bit
is used to
set
the special mask
mode.
If
SMM is set
to
a
1,
the special mask
mode
is selected. If
it
is
0,
it is
not
selected.
The state
of
the SMM
bit
is
only
honored
if it
is
enabled by the ESMM bit.
ESMM: The ESMM
bit
is
used
to
enable or disable the
effect
of the SMM bit.
If
ESMM
is
set
to
a
1,
SMM
is
enabled. If ESMM
is
O.
SMM
is
dis-
abled. This
bit
is useful
to
prevent interference
of
mode and command selections in OCW3.
IR
LE"EllO
BE
"CTEC
UP~N
SPECifiC
ROHolION
AUTOU,lTtC
ROTATION
END
or;
INTERRUPT
No" spee,'"
EOI
COlTlITII,,1j
'Spee,t,c
£01 CornmanO
Aou".
0",
NonSpec,hC
EOI
Comm."ll
Rote,.
In
...
,,10""',e
rr:OIUode (SET)
Rotl'e
In
."to.,.,',e
(01
MOde
(ClE"R\
·Rolile
0"
Spee'he
EOI
Comm,ncl
•
Se'
Pr'Of,r., COfl'>mlnlj
No
Operll'Ofl
'Le
Ll
IflI!
~sed
OCWJ
SOME OF
1HE
lERMI
..
OlOGV
USED MAV DIFFER SLIGHTLV FROM
E~ISTING
12~''''
OAT
...
SHEETS.
1HIS
IS
OO
..
E
10
8EHER
CL",RIFV .....0
E~PL""N
THE PROGR
...
M·
MI
..
G OF
1HE
8259
....
1HE
OPERA110NAL RESUL
1S
REM
A'"
1HE
SAME.
Figure
23.
Operational Command Worlls (OCWs) Programming Format
SL: The SL
bit
is used to select a
specific
level for
a given operation. If SL is set
to
a
1,
the
u:i-L2
bits
are enabled. The operation selected by the
EOI and R
bits
will
be executed on the
specified
interrupt
JeveL If SL
is
O.
the LO-L2
bits
are disabled.
R:
The R
bit
is used
to
control
all 8259A rotation
operations. If the R bit is set
to
a
1,
a
form
of
priority
rotation
will
be executed depending
on
the
state
of
SL and
EOI
bits. If R is
O.
rotation
won't
be executed.
52