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LG 84LM9600 - Page 55

LG 84LM9600
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THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
L121
UD_VCC
L122
SMAW200-10
P100
1
2
3
4
5
6
7
8
9
10
20037WR-05A00
P101
1
2
3
4
5
6
22uF
10V
C110
4700pF
50V
C109
NR8040T3R6N
3.6uH
L106
100
1%
R100
+1.2V_FPGA
+3.3V
+12V_BE
+2.5V_FPGA
22uF
10V
C138
3300pF
50V
OPT
C114
0
R116
47K
1%
R117
4700pF
50V
C130
+3.3V
3300pF
50V
OPT
C141
22uF
10V
C137
22K
1%
R118
THERMAL
AOZ1038PI
IC101
3
AGND
2
VIN
4
FB
1
PGND
5
COMP
6
EN
7
NC_1
8
NC_2
9
[EP]LX
10K
R122
OPT
11K
1%
R101
NR8040T3R6N
3.6uH
L103
3.3K
R121
THERMAL
AOZ1038PI
IC104
3
AGND
2
VIN
4
FB
1
PGND
5
COMP
6
EN
7
NC_1
8
NC_2
9
[EP]LX
3.3K
R107
22K
1%
R102
100pF
50V
OPT
C101
MLB-201209-0120P-N2
L105
100pF
50V
OPT
C116
10K
R109
OPT
MLB-201209-0120P-N2
L100
22uF
10V
C112
0.1uF
16V
C127
MLB-201209-0120P-N2
L109
30K
1%
R111
4700pF
50V
C108
THERMAL
TPS54327DDAR
IC102
3
VREG5
2
VFB
4
SS
1
EN
5
GND
6
SW
7
VBST
8
VIN
9
[EP]GND
22pF
50V
C118
MLB-201209-0120P-N2
L101
22uF
10V
C140
0.1uF
16V
C126
22uF
10V
C134
100pF
50V
OPT
C100
10K
R108
10K
R119
NR8040T3R6N
3.6uH
L102
0
R113
22uF
10V
C111
6.8K
1%
R104
330
1%
R103
51K
1%
R114
22K
1%
R115
22uF
10V
C139
22pF
50V
C117
+2.5V_PA138
22uF
10V
C136
THERMAL
TPS54327DDAR
IC103
3
VREG5
2
VFB
4
SS
1
EN
5
GND
6
SW
7
VBST
8
VIN
9
[EP]GND
+1.8V_PA138
22K
1%
R105
NR8040T3R6N
3.6uH
L108
3300pF
50V
OPT
C115
0
R110
THERMAL
AOZ1038PI
IC100
3
AGND
2
VIN
4
FB
1
PGND
5
COMP
6
EN
7
NC_1
8
NC_2
9
[EP]LX
NR8040T3R6N
3.6uH
L107
22uF
10V
C113
3.3K
R106
3300pF
50V
C124
MLB-201209-0120P-N2
L110
22K
1%
R112
+1.05V_PA138
3.3K
R124
L114
10K
R125
10K
R123
L115
10K
R126
PANEL_CTL
2SC3052
Q100
E
B
C
UD_VCC
0
OPT
R130
1.8K
R127
L119
L118
UD_VCC
L120
+1.2V_FPGA
+2.5V_FPGA
+12V_BE
+12V_BE
+12V_BE
+12V_BE
+1.05V_PA138
+2.5V_PA138
+1.8V_PA138
+2.5V_PA138
+2.5V_PA138
10K
R120
+2.5V_FPGA
3300pF
50V
C123
PANEL_VCC
0.01uF
50V
C147
PANEL_VCC
0.1uF
25V
C154
0.1uF
25V
C158
0.1uF
25V
C143
0.1uF
25V
C151
0.1uF
25V
C157
0.1uF
25V
C145
0.1uF
25V
C128
0.1uF
25V
C102
0.1uF
25V
C121
0.1uF
25V
C103
0.1uF
25V
C129
2K
OPT
R133
2K
OPT
R131
AO4423
Q101
3
S3
2
S2
4
G
1
S1
5
D1
6
D2
7
D3
8
D4
+12V_BE
0
R135
5%1/8W
0
R134
5%1/8W
0
R136
0
R137
22
R138
LG1122_RST
22
R139
LG1122_RST
10uF
25V
C122
10uF
25V
OPT
C133
10uF
25V
C104
10uF
25V
OPT
C135
10uF
25V
C132
10uF
25V
C142
10uF
25V
OPT
C144
10uF
25V
C149
10uF
25V
C148
10uF
25V
C150
10uF
25V
OPT
C153
10uF
25V
OPT
C156
10uF
25V
C152
10uF
25V
C155
10uF
25V
OPT
C125
10uF
25V
OPT
C107
10uF
25V
C105
10uF
25V
OPT
C106
10uF
25V
C131
1uF
10V
C120
1uF
10V
C119
2012.06.05EAX64768002
1.0
1 21
Wafer
T-con power
MAX 3AMAX 6A
R1
FPGA for 2.5V
R2
FPGA Block
R1
Vout=0.8*(1+R1/R2)
Vout=0.8*(1+R1/R2)
R2
FPGA for 1.2V
PA138 Block
Vout=0.765*(1+R1/R2)
R2
tss(ms)=[C303(nF)*Vref]/Iss(uA)
MAX 0.2A
R1
R2
MAX 1.24A
Vout=0.8*(1+R1/R2)
R1
tss(ms)=[C303(nF)*Vref]/Iss(uA)
PA138 for 1.05V
PA138 for 1.8V
R2
PA138 for 2.5V
Vout=0.765*(1+R1/R2)
R1
MAX 5.1A
TYP 6000mA
PANEL_POWER
Panel
Copyright ⓒ 2012 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only

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