LG F3000 - Page 106

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2
1
9
LEE SEUNG YOON
Iss.
4
PARK JAE WAN
1
E
JUNG SUN IN
Approved
3
LG Electronics Inc
.
Designer
5
NO.
Sign & Name
87
LGIC(42)-A-5505-10:01
A
D
B
DRAWING
6
Sheet/Sheets
2
MODEL
4
2005
A
Date
F3000
5 / 7
VER. 1.3
NAME
3
Section
Notice No.
LG Electronics Inc.
12/01
5 10
Checked
DRAWING
Date Name
R507
0 C524
NA
C517
0.01u
10p
C514
C508
0.1u
C510
39p
C511
SW500
KMS-506
ANT
G1 G2
RF
39p
27p
C505
10KR510
TP501
R504 0
0.01u
3p
C526
VBAT
VBAT
C591
ANT
13
GND1
1
GND2
3
GND3
5
GND4
7
14
GND5
15
GND6
GND7
16
8
GSM18001900_TX
4
GSM1800_RX
6
GSM1900_RX
2
GSM900_RX
10
GSM900_TX
VC1
11
VC2
9
12
VC3
FL610
LMSP54LA-445TEMP
0R746
2.2u
C528
R500
10p
VBAT
2V75_VVCXO
VBAT
C504
27p
3.3nHL591
C516
0.01u22u
C515
C525 1000p
R508 100
C513
33p
R509 1M
22u
C509
C521
2.2u
ANT
1000p
C522
R505
47p
0.1u
C512
C506
0.1u
C503
27p
5.6nHC500
L500 NA
1000p
3
OUT
4
VCC
1
VCONT
TP500
C502
26MHz
X500
2
GND
C527
4.7u
33p
C501
C529
1000p
NA
C519
0.5p
C518
C520
4.7u
33p
C507
VBAT
VBAT
C523
NA
1000pC541
2V75_VVCXO
VAPC
VBAT
42
VCC1
6
VCC2
52
1
VCC3
11
VCC_1A
VCC_1B
22
54
XBUFF
51
XTAL
53
XTUNE
94
95
PGND27
PGND28
96
PGND3
71
PGND4
72 73
PGND5 PGND6
74
PGND7
75
PGND8
76
77
PGND9
55
PREQ_SEL
5
Q+_TX_Q+
Q-_TX_Q-
4
49
RXENA
59
SXENA
48
TXENA
9
PGND11
PGND12
80
81
PGND13
PGND14
82
83
PGND15
PGND16
84
85
PGND17
86
PGND18
87
PGND19
PGND2
70
PGND20
88
89
PGND21
PGND22
90
91
PGND23
PGND24
92
PGND25
93
PGND26
20
31
GSM_OUT
I+_TX_I+
2
3
I-_TX_I-
57
LE
NC_RX_I+
64 63
NC_RX_I-
62
NC_RX_Q+
61
NC_RX_Q-
65
PCO1 PCO2
66 67
PCO3 PCO4
68
7
PED_SELECT
69
PGND1
78
PGND10
79
GND20 GND21
34 35
GND22 GND23
36 37
GND24 GND25
38
GND26
40
GND27
41 43
GND28 GND29
50
GND3
14
15
GND4
GND5
16
17
GND6
GND7
18
GND8
19
GND9
58
DATA_IN
56
39
DCS_PCS_OUT
ENABLE
8
GND1
12
21
GND10
23
GND11
24
GND12
25
GND13
GND14
26
27
GND15
GND16
28 29
GND17 GND18
30
GND19
32
GND2
13
33
SKY74400
U500
45
1800LNA
1900LNA
44
47
850LNA
900LNA
46
BAND_SELECT
10
60
CHIP_EN
CLK
26M_CAM
ANT_SW3
ANT_SW2
ANT_SW1
AFC
26M_DBB
26M_RF
TX_RAMP
QP
QN
RX_EN
SYNTH_EN
TX_EN
26M_RF
PA_BAND
RF_PWR_DWN
S_CLK
S_DATA
PA_EN
IP
IN
S_EN
7. CIRCUIT DIAGRAM