LG FLATRON F700B - PIN CONFIGURATION; M24 C08 EEPROM PINOUT; TDA4867 J IC PINOUT

PIN CONFIGURATION
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M24C08 Serial I
2
C BUS EEPROM
SYMBOL
E0-E2
SDA
SCL
WC
Vcc
Vss
DESCRIPTION
Chip Enable Input
Serial Data Address Input/Output
Serial Clock
Write Control
Supply Voltage
Ground
1
PSDIP8 (BN)
0.25mm Frame
8
1
1
SO8 (MN)
150mil Width
TSSOP8 (DW)
169mil Width
8
8
Logic Dirgram
TDA4867J PHILIPS 32P, SDIP
AMPLIFIER A
FLYBACK
GENERATOR
GUARD
CIRCUIT
INPUT STAGE
from e.g TDA485X
or SAA4856
INP
INN
IPROTECTION
AMPLIFIER B
4
9
6
8
1
2
357
OUTA
GUARO output/
power save mode
GND
FEEDB
OUTB
vertical
deflection
coil
R
p
V
p
V
FB
R m
R ref
I defl
Block Diagram
SYMBOL
INP
INN
V
P
OUTB
GND
OUTA
V
FB
GUARD
FEEDB
DESCRIPTION
non-inverted input
inverted input
supply voltage
output B
ground
output A
flyback supply voltage
guard output
feedback inprt
PIN
1
2
3
4
5
6
7
8
9
INP
INN
V
P
OUTB
GND
OUTA
V
FB
GUARD
FEEDB
1
2
3
4
5
6
7
8
9
TDA4867J
Pin Configuration