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LGE Internal Use Only Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
3. Technical brief
Low power consumption
– Ultra low power architecture with 3 different low power levels
– Deep Sleep modes, including Host-power saving feature
– Dual Wake-up mechanism: initiated by the Host or by the Bluetooth device
Communication interfaces
– Fast UART up to 4 MHz
– Flexible SPI interface up to 13 MHz
–PCM interface
– Up to 10 additional flexibly programmable GPIOs
– External interrupts possible through the GPIOs
– Fast I2C interface as master
Clock support
– System clock input (digital or sine wave) at 9.6, 10, 13, 16, 16.8, 19.2, 26, 33.6 or 38.4MHz
– Low Power clock input at 3.2, 32 and 32.768 kHz
ARM7TDMI CPU
Memory organization
– On chip RAM, including provision for patches
– On chip ROM, preloaded with SW up to HCI
Ciphering support up to 128 bits key
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