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Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
3. Technical brief
G. GD580 Bluetooth Schematic
Figure 3-1-11. Schematic of STLC2593C
y Clock
- Clock request
Æ Connected to CLKREQ of DB3150 and AB3000, input to RF3000 and RF3100
- Fast clock : 26MHz
Æ Supplied MCLK from RF3000
Æ Frequency deviation : 20ppm
- Low power clock : 32.768kHz
Æ Supplied RTCCLK from AB3000
y Power
- Supplied 2.75V, 1.8V from internal regulators of AB3000
y Reset
- RESOUT2n signal of DB3150 controls STLC2593C reset.
y SPI
- Connected to SPI of DB3150
- HCI interface between DB3150 and STLC2593C
y PCM
- Audio signal interface between DB3150/AB3000 and STLC2593C
y ANT
- 2.4GHz, 50 ohm matching
P
T
7
0
2
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BNF
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MCP
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B
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PG_
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NA
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1_N
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2_N
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PUEKAW
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MS
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N_RVS
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1
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2
T
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ET_TB
1
CNG
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P_FA
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2C
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3
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4C
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MF
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3
D
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_
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3
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P
I
MF_
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6D
NG_MF
BTS
R_
M
F
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N
G
_M
F
KL
CR_
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8D
NG_
MF
BNE
S_
MF
KLC
S_
MFD
N
GFR_
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57V2_
K
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8V1_EDDV
R201
100K
2
0
2
P
T
P
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P
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P
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PT
4
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P
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P
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P
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51
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K
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N_QER
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NY
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P
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K
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A
D
L
U
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P
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CC
A
DLD_MCP_CC
A
P
L
_
M
F
PR
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MF
TN
A
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F
N
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SER
YDR_MF_PG_CCA
LATIG
I
D_DNG|ANA_TB
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LATIGI
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B
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SV
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AD
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D
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B
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PG
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LCS_MF_PG_PPA
A
DS_
M
F
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A
DNG
Y
KL
C
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B
K
L
C
M
30
6
0
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