LG GW520 - 8 Circuit Diagram

- 149 -
8. CIRCUIT DIAGRAM
LGE Internal Use OnlyCopyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
PWR
URXD
UTXD
3G 2.5G
GND
RX
TX
VCHAR
ON_SW
VBAT
D
I2C3 (GPIO )
USB
2
2V11_RTC
E
C
VDDA_BB
POWER_DOMAIN
Net Name
140
11
VAUDIOa
1.8/2.9
9
BB, Memory, etc..
2.8
VDD_RTC
(PMB8878)
VDDA_M
SIM
Three-Axis Accel.
1 0 1
3
LCD_RDn : Pullup(SW)
1.5/1.32/2.5/2.85
VDDP_DIGA
SHIELD CAN
VDDP_DIGA
D
2V5_VAUDIOA
VDD_IO_LOW1
VAFC
0.98
Touch IC, Key Encoder, etc..
VDD_IO_LOW1
1V35_CORE
Output Voltage( V )
VDDP_DIGC1
(1%)
VDDA_BG
SD2
VDDP_DIGC1
100
4
AUDIO_AMP
VRTC
VDD_RTC
BB (PMB8878)
5
UART TPs for MP
10
G
VRF2
150
2.5
F
ON BOARD ARM9 JTAG
(1%)
P/N Out only
2V65_TOUCH
VDDP_DIGD
VDDP_DIGC2
PMIC
150
600
1V5_VRF
C
T-Flash
H
G
Three-Axis, LCD
VDDP_MEM_ETM
VDDA_VBT
2.62
VUSB
180@2.70V/2.85V
(1%)
(1%)
67
VDDP_MEM_ETM
1V8_SD
B
VDDP_DIGE
VDD_ANALOG
TOUCH IC
VDDP_DIGA
VDD_IO_HIGH1
11
VDD_IO_HIGH
1.8v Domain Gpio and another chip 2.62v interface connection
6
2.5
200
4
Tranceiver
1 0 0
1.80/2.70/2.85
110
SU1
1.8/2.5/2.6/2.9
LB nand 16bit
150
30
VDD_IO_HIGH2
8
2V8_VMME
Tranceiver
VDDP_DIGB
2.9
VDDP_DIGA
E
F
VDDP_DIGE
VDDA_DIGC2
Device
40
9
1.35
7
Output Current ( mA )
BB
A
LInear Motor
B
VRF3
VDDP_DIGA
2V9_SIM
3.1
2V62_VIO
VDDP_DIGE
H
(for SGold3)
VDDP_DIGC1
VUSB
2
2V85_VRF
& ETM INTERFACE
Backup Battery
0 ... 120
1.53/2.70/2.85
(We need Pull-Up and Open Drain Setting)
VSIM 70
VDDA_BG
VDDP_MEM
VDDP_MMC
125
5
SD1
50
Touch
VPll
10
2V8_AMP
A
VIO
100
400
VDDP_SIM
2V85_VLCD
VDDP_DIGE
12
4
2Gb NAND +1Gb DDR SDRAM
1 3
VDD_RTC
Tranceiver
VDD_IO_LOW1
Regular Name(PMIC)
2.54/2.70/2.85
VVIB
(for 3G solution)
1.35
2.65
VDDA_VBR
8
1
BB
VDDP_DIGE
VDD_IO_LOW1
I2C_QWTY
QWERTY
I2C_TOUCH
PMIC
BT
MUIC
1.8
BB
CAMERA
VMME
VDDP_MEM_ETM
5.6 ... 25
SB nand 8bit
100
VUMTS
I2C2
2
2V65_VBT
MON1 MON2 TRIG_IN
VDD_PLL0
1V35_VPLL
2V85_VFM
VAUDIOb
100@1.53V
I2C1
VAUX
VRF1
2V5_VAUDIOB
TP107
1000pC150
3300
R106
C154
56p
R123 4.7K
OJ101
C137 0.1u
TP119
1V8_SD
TP109
2V62_VIO
TP112
TP116
TP117
1V35_CORE
1V35_CORE
C152
56p
0.1u
0.01uC132
C141
DNIR119
TP106
1uC119
R101 10K
C138 0.01u
20p
C144
C117 0.1u
0.1u
TP121
C102 C113
DNI
0.1u
R114
0.1u
22
C143
0.1u
R108
C123
0.1u
0.01uC124
TP114
C109
CTS
12
DSR
10
GND
1
NC1
4
7
NC2
NC3
8
9
NC4
5
ON_SW
11
RTS
RX
2
3
TX
6
VBAT
U103
TP110
1uC112
0.1u
_WEN
N3
_WP
C131
VDDQ1
P8
VDDQ2
C5
VSS1
C9
VSS2
G2
VSS3
H10
VSS4
P7
VSS5
VSS6
P9
P5
VSSQ
_CAS
E6
G3
_CE
C6
_CLK
_CS
D5
F6
_RAS
F3
_RE
D6
_WED
M3
T1 T2
NC66 NC67
T3
T10
NC68 NC69
T11
B1
NC7
NC70
T12
B2
NC8
B3
NC9
R__B
E3
K7
UDQM
L7
UDQS
H2
VCCN1
C4
VDD1
C8
VDD2
P6
VDD3
P4
NC50 NC51
L2
NC52
M2
NC53
N2
NC54
P1 P2
NC55
P3
NC56 NC57
P11 P12
NC58 NC59
Q1
A12
NC6
Q2
NC60 NC61
Q3
NC62
Q10
NC63
Q11
NC64
Q12
NC65
J3 J4
NC37
J5
NC38 NC39
J6
NC4
A10
NC40
J7
NC41
J8 J9
NC42
J10
NC43 NC44
J11
K2
NC45
K4
NC46
K5
NC47
K8
NC48 NC49
K9
A11
NC5
K10
E2 H11
NC22
F2
NC23 NC24
F9
NC25
G6
NC26
G9
NC27
G10
NC28
H3
NC29
H4
NC3
A3
NC30
H5 H6
NC31
H7
NC32
H8
NC33 NC34
H9 J2
NC35
NC36
M11
K6
LDQM
LDQS
L6
NC1
A1 B10
NC10
B11
NC11 NC12
B12
NC13
C1
NC14
C2
NC15
C3
NC16
C11
NC17
C12 D1
NC18
D2
NC19
A2
NC2
D3
NC20 NC21
N7
P10
I_O0
N10
I_O1
L11
I_O10
I_O11
K11
I_O12
G11
I_O13
F11
E11
I_O14
D11
I_O15
M10
I_O2
L10
I_O3
F10
I_O4
E10
I_O5
D10
I_O6
I_O7
C10
N11
I_O8
I_O9
C7
DQ0
L4
DQ1
M4
DQ10
L8
M8
DQ11
N8
DQ12
L9
DQ13
M9
DQ14
N9
DQ15
DQ2
N4
DQ3
L5
M5
DQ4
DQ5
N5
DQ6
M6
N6
DQ7
M7
DQ8
DQ9
F7
A12
E7
A13
E9
A2
F4
A3
G4
A4
G8
A5
F8
A6
E8
D8
A7
A8
D9
A9
G7
L3
ALE
BA0
E5
BA1
F5
CKE
D7
CLE
K3
CLK
U100
H8BCS0SI0MAP_56M
EUSY0347503
A0
D4
A1
E4
G5
A10
A11
OJ102
1V8_SD
15p
C151
1u
TP100
C125
0R117
0.1u
C1000.1u
C106
TP_UART_RX
390K
R100
NC7SZ74L8X
CK
7
6
D
GND
4
3
Q
8
VCC
_CLR
2
1
_PR
_Q
5
U101
EUSY0306201
0.1uC107
TP104
VBAT
20p
C147
0.01uC136
C148 220n
0.1uC108
12
X100
32.768KHz
FC-135
EXXY0018701
2V9_SIM
R112
10K
2V62_VIO 2V5_VAUDA
C134 0.01u
C135 0.1u
22K
2.2K
R105
R124
R120 2.2K
R122 2.2K
TP118
20
21
22
23
24
G1 G2
G3 G4
4
5
6
7
8
9
16
25
26
27
28
29
30
17
18
19
AXT430124
ENBY0029001
1
10
11
12
13
14
15
2
3
CN101
TP_RPWRON
C116 1u
2V62_VIO
R110
1K
0R118
2V62_VIO
2V62_VIO
TP103
DNI
R102
C128 0.1u
C139
TP115
0.1u
56p
C153
C140
2V5_VAUDB
1V8_SD
0.01u
1V8_SD
2V62_VIO
TP120
TP108
C133 0.1u
4.7K
1V8_SD
R121
1uC115 0.1uC114
R115
OJ100
DNI
0.01u
100K
C127
R113
OJ103
0.1uC111 0.1uC104
R109
1K
2V5_VAUDB
0.1uC101
0.1u
VBAT
C120
0.1uC105
2V62_VIO
C110
TP111
C103
0.1u
TP101
0.1u
2V8_VMME
TP_UART_TX
1V8_SD
3.3KR104C142 0.01u
1V35_VPLL
TP105
1V35_VPLL 1V8_SD
R107
DNI
R111 22K
1V8_SD
TP102
0.1uC149
R103
100K
C145
DNI
2V62_VIO
DNI
C146
C122
2V11_RTC
0.01u
0.1u
C118 C130 0.01u
TP113
TP_DSR
28
29
30
17
18
19
20
21
22
23
24
G1 G2
G3 G4
12
13
14
15
2
3
4
5
6
7
8
9
16
25
26
27
CN100
ENBY0029001
AXT430124
1
10
11
0.01uC121
VSS22
P12 M12
VSS23 VSS24
P11
VSS25
M11
VSS26
P10 M10
VSS27 VSS28
P9
VSS29
M9
VSS3
G19 P8
VSS30
VSS4
E19
VSS5
F18 A16
VSS6 VSS7
F10
VSS8
B9 H8
VSS9
J4
VREFP
V19
VSS0 VSS1
P19
VSS10
H6
VSS11
G6 AD5
VSS12
N5
VSS13 VSS14
E5
VSS15
L3
VSS16
J3 G3
VSS17
B3
VSS18 VSS19
AC2
VSS2
L19 R1
VSS20 VSS21
AD10 U19
VDD_FUSE_FS
A2
VDD_HIGH_OUT
B17
VDD_IO_HIGH1A
B11
VDD_IO_HIGH1B
VDD_IO_HIGH2
AD4
VDD_IO_LOW1
B4 AD1
VDD_IO_LOW2 VDD_IO_LOW3
AE9
VDD_IO_LOW4A
T19 K19
VDD_IO_LOW4B
VDD_PLL0
G8
VDD_PLL1
B8
VDD_RTC
F8
G5
VMICN VMICP
H5
VREFN
K4
VDDP_DIGD
Y15 W19
VDDP_DIGE
E18
VDDP_MEM_ETM0 VDDP_MEM_ETM1
J17
VDDP_MEM_ETM2
D17
VDDP_MEM_ETM3
D15
VDDP_MEM_ETM4
N16 D10
VDDP_MEM_ETM5
VDDP_MMC
AB8
VDDP_SIM
P1 AE15
VDD_ANALOG
AD6
VDD_CORE1 VDD_CORE2
AE10 B14
VDD_CORE3 VDD_CORE4
B6 A7
VDD_EFUSE
VDD5
N10 L10
VDD6
R11
VDD7
N11
VDD8
L11
VDD9
K5
VDDA_BB
H7
VDDA_BG
VDDA_D
H4
VDDA_M
F6 E1
VDDA_VBR1
H3
VDDA_VBR2
L2
VDDA_VBT
VDDP_DIGA
V3 AB13
VDDP_DIGB
VDDP_DIGC1
AB2
VDDP_DIGC2
AA2
Y17
USIF1_TXD_MTSR
V6
USIF2_CTS_N
U4
USIF2_RTS_N USIF2_RXD_MRST
T2
R4
USIF2_TXD_MTSR USIF3_RXD_MRST
AB18
USIF3_SCLK
W16
AA18
USIF3_TXD_MTSR
AE3
USIF_RXD USIF_TXD
AD3
VDD0
N8
VDD1
R9
VDD10
N12 N9
VDD2 VDD3
L9 R10
VDD4
T_IN1
AA3
Y8
T_OUT0
AB7
T_OUT1
AB5
T_OUT10
V9
T_OUT2
T_OUT3
AA8
T_OUT4
W9
V8
T_OUT5
T_OUT6
AB3
T_OUT7
AB4
W8
T_OUT8
T_OUT9
AC1
UMTS_WKP
C3
V16
USIF1_CTS_N USIF1_RTS_N
AB16
USIF1_RXD_MRST
V15
T1
SPCU_RQ_IN0
R3
SPCU_RQ_IN1
SPCU_RQ_IN2
V1
SWIF_TXRX
T5
G9
TRACECLK
D12
TRACEPKT[0]
TRACEPKT[1]
E10
B7
TRACEPKT[2]
TRACEPKT[3]
D9
TRACEPKT[4]
D11
TRACEPKT[5]
G7
TRACEPKT[6]
E9
D8
TRACEPKT[7]
D16
TRACESYNC
TRIG_IN
AA7
AB1
T_IN0
D6
OSC32K
PAOUT1_1
P4
PAOUT1_2
M8
D13
PIPESTAT[0]
PIPESTAT[1]
H10
PIPESTAT[2]
G10
PM_INT
E7
RESET_N
E6
RF_CLK
W7
W5
RF_DATA
RF_STR0
AA1
AC3
RF_STR1
RSTOUT_N
R2
A4
RST_N
RTC_OUT
F7
SPCU_RC_OUT0
T3
M3
MICP2
MMCI1_CLK
AB9
W10
MMCI1_CMD
AB6
MMCI1_DAT[0]
Y11
MMCI1_DAT[1]
V10
MMCI1_DAT[2]
AA9
MMCI1_DAT[3]
MMCI2_CLK
V14
AB17
MMCI2_CMD
MMCI2_DAT[0]
AA17
MON1
Y7
Y9
MON2
NC0
AE19
NC1
AE1
NC2
A19
NC3
A1
K18
MEM_CS0_N
MEM_CS1_N
L17
MEM_CS2_N
M16
MEM_CS3_N
N15
G17
MEM_CSA0_N
H15
MEM_CSA1_N
H14
MEM_CSA2_N
MEM_CSA3_N
H13
H12
MEM_RAS_N
MEM_RD_N
Y18
C18
MEM_SDCLKO
MEM_WAIT_N
Y19
MEM_WR_N
K17
L1
MICN1 MICN2
M2
K1
MICP1
MEM_A[2]
G16
MEM_A[3]
F14
E15
MEM_A[4]
MEM_A[5]
F16
MEM_A[6]
G14
E14
MEM_A[7]
MEM_A[8]
E13
MEM_A[9]
F13
F17
MEM_BC0_N
H17
MEM_BC1_N
MEM_BC2_N
F15
MEM_BC3_N
F12
MEM_BFCLKO1
D18
MEM_BFCLKO2
E17
MEM_CAS_N
D14
MEM_CKE
H11
MEM_A[12]
E12
MEM_A[13]
G12
G11
MEM_A[14]
MEM_A[15]
F11
J18
MEM_A[16]
L15
MEM_A[17]
MEM_A[18]
H18
MEM_A[19]
F19
E16
MEM_A[1]
J15
MEM_A[20]
MEM_A[21]
G18
K16
MEM_A[22]
D19
MEM_A[23]
K15
MEM_A[24]
H16
MEM_A[25]
MEM_A[26]
J16
L18
MEM_AD[12]
M15
MEM_AD[13]
MEM_AD[14]
P18
L16
MEM_AD[15]
N18
MEM_AD[1]
MEM_AD[2]
T15
MEM_AD[3]
R19
N17
MEM_AD[4]
M19
MEM_AD[5]
M18
MEM_AD[6]
MEM_AD[7]
M17
T18
MEM_AD[8]
R18
MEM_AD[9]
G15
MEM_A[0]
G13
MEM_A[10]
MEM_A[11]
E11
U15
KP_OUT3
F3
M0
M1
G4
F5
M10
E2
M2
M3
D1
M4
F4
E3
M5
M6
D3
E4
M7
D2
M8
M9
D4
P17
MEM_ADV_N
N19
MEM_AD[0]
R16
MEM_AD[10]
MEM_AD[11]
P16
V7
JTAG0_TRST_N
JTAG1_RTCK
AE6
JTAG1_TDI
AD2
JTAG1_TDO
AE2
JTAG1_TRST_N
AE5
JTSG1_TMS
AE4
KP_IN0
W18
KP_IN1
P15
U17
KP_IN2
R15
KP_IN3 KP_IN4
T17
U18
KP_IN5 KP_IN6
R17
KP_OUT0
U16
V17
KP_OUT1 KP_OUT2
AA19
W3
I2S1_TX I2S1_WA0
Y2
U1
I2S2_CLK0 I2S2_CLK1
U5
W1
I2S2_RX I2S2_TX
V2
I2S2_WA0
U2 U3
I2S2_WA1
AB19
IRDA_RX
IRDA_TX
W17
J5
IREF
JTAG0_RTCK
V4
AA5
JTAG0_TCK
Y3
JTAG0_TDI
Y5
JTAG0_TDO
JTAG0_TMS
Y6
GPIO[5]
A17
B16
GPIO[6]
GPIO[7]
A15
B15
GPIO[8]
A14
GPIO[9]
GUARD
R5
I2C1_SCL
AA6 AA4
I2C1_SDA
Y4
I2C2_SCL I2C2_SDA
V5
I2RF_DATA
C2 C1
I2RF_SCLK
B2
I2RF_STR0
W4
I2S1_CLK0
Y1
I2S1_CLK1
W2
I2S1_RX
FWP
F9
GPIO[0]
C19
GPIO[10]
B5
B13
GPIO[11]
A13
GPIO[12]
GPIO[13]
A12
GPIO[14]
B12
GPIO[15]
A11
A10
GPIO[16]
GPIO[17]
B10
A9
GPIO[18]
GPIO[19]
A8
GPIO[1]
B19
B18
GPIO[2]
A18
GPIO[3]
GPIO[4]
C17
J2
EPP1_2 EPPA1_1
H1 H2
EPPA1_2 EPPA2_1
F1 F2
EPPA2_2 EPREF1
G1 G2
EPREF2
AD8
ESIF_ADVN
H19
ESIF_CLK
ESIF_CSN
AE7
AE8
ESIF_RDN
J19
ESIF_WAITN
ESIF_WRN
AD9
D7
F26M
D5
F32K
FCDP_RBN
H9
DIF_D6
AC17
DIF_D7
AD18 AD19
DIF_D8
AC19
DIF_DS1 DIF_HD
AC18
Y14
DIF_RD
V12
DIF_RESET1 DIF_RESET2
Y13
DIF_VD
Y16
DIF_WR
AA16
T16
DSPIN0
V18
DSPIN1
W14
DSPOUT1 EPN1_1
K2 K3
EPN1_2 EPP1_1
J1
AA12
CIF_PCLK
AB12
CIF_PD CIF_RESET
AA10
CIF_VSYNC
AA13
CLK26M
A6
B1
CLK32K
E8
CLKOUT0
CLKOUT2
AB14
DIF_CD
AA15
DIF_CS2
W15
V13
DIF_D0
AB15
DIF_D1 DIF_D2
AD16
W13
DIF_D3
AA14
DIF_D4 DIF_D5
AE18
M4
BB_Q
P5
BB_QX
A5
BOOT_CFG[0]
A3
BOOT_CFG[1]
CC_CLK
P2
T4
CC_IO
P3
CC_RST
V11
CIF_D0 CIF_D1
Y10
AB10
CIF_D2
Y12
CIF_D3 CIF_D4
AB11
AD7
CIF_D5 CIF_D6
AA11
CIF_D7
W12 W11
CIF_HSYNC
ARXP_I
AD15
AD17
ARXP_Q
AD13
ATXN_I
ATXN_Q
AD14
ATXP_I
AE13
ATXP_Q
AE14
ATX_PA_ADC
AE12
ATX_PA_DAC
AE11
AD11
ATX_VGA_DAC
N4
AUXGND AUXN1
N3 N1
AUXN2 AUXP1
M1
AUXP2
N2
L5
BB_I
M5
BB_IX
U102
XMM6070
EUSY0355101
AFC
W6
L4
AGND
AD12
AIREF
AE16
ARXN_I
ARXN_Q
AE17
2.2KR125
1V8_SD
C126 1u
TP122
OJ104
0
R116
1uC129
VBUS_USB
SLIDE_KEY_LED
USB_DP
USB_DM
HS_MIC_N
HS_MIC_P
LCD_BL_CTRL
_CHG_EN
LIN_PWM_FREQ
I2C3_SDA
I2C3_SCL
_WAIT
PM_VCXO_EN
CAM_LDO_EN
LCD_VSYNC
SHIFT_LED
CIF_VSYNC
CAM_RESET
MMC_CLK
MMC_CMD
MMC_D0
MMC_D3
MUIC_INT
UART_TX
UART_RX
MON_TXD
MON_RXD
LIN_PWM_MAG
LCD_RDn
DBB_BT_INT
LCD_CD
FN_LED
LCD_DATA(4) LCD_DATA(5) LCD_DATA(6) LCD_DATA(7)
AFC
BT_PCM_TX
BT_PCM_RX
BT_VCXO_EN
MMC_D2
MMC_D1
NAND_IO(13)
NAND_IO(14)
NAND_IO(15)
NAND_IO(10)
CLK32K
MMC_DETECT
LIN_INVERTER
RPWRON_DBB
VGA_PWDN
_PPR
_WP
KEY_I2C_SCL
KEY_I2C_SDA
LCD_DATA(1) LCD_DATA(2) LCD_DATA(3)
3G_VGC_TX
2G_CLK
2G_DATA
2G_EN
26MHZ
3G_MASTERON
3G_LD
3G_PA_MODE1
ANT_SEL1
RF_TEMP
NAND_IO(0:15)
NAND_IO(0)
NAND_IO(1)
NAND_IO(3)
NAND_IO(4)
NAND_IO(5)
NAND_IO(6)
NAND_IO(7)
NAND_IO(2)
NAND_IO(8)
NAND_IO(9)
NAND_IO(11)
NAND_IO(12)
_RD
_WAIT
_WR
ACCEL_INT
2G_IP
2G_IN
2G_QP
2G_QN
3G_RX_IN
3G_RX_QN
3G_RX_IP
3G_RX_QP
3G_TX_IN
3G_TX_QN
3G_TX_IP
3G_TX_QP
BA1
BFCLKO
_CS3
VREFN
ANT_SEL6
3G_DATA
3G_CLK
3G_EN
A_RTCK
A_TDI
A_TDO
A_TRSTn
A_TMS
BA1
BFCLKO
_CS3
A_RESET
_CHG_EOC
I2C2_SCL
I2C2_SDA
EAR_SPK_P
SD_ADD(0:10)
SD_DATA(0:15)
SD_ADD(10)
SD_ADD(11)
SD_ADD(12)
SD_ADD(13)
BA0
LDQS
UDQS
PA_LEVEL
LCD_ID
ANT_SEL4
ANT_SEL5
USB_OEn
A_RESET
ANT_SEL2
KEY_INT
TOUCH_SDA
WDOG
TOUCH_INT
QWERTY_KEY_EN
SDCLKI
TOUCH_SCL
USB_SE0_VM
CIF_MCLK
UART_BT_CTS UART_BT_RTS
UART_RX
MON_TXD
UART_BT_TX
LIN_MOTOR_EN
PM_VCXO_EN
VMIC_GND
VMIC_P
VREFN
SLIDE_DETECT
CLK32K
CIF_HSYNC
CIF_PCLK
M_CAM_PD
RTCK
RTC_OUT
I2C1_SCL
I2C1_SDA
TCK
TDI
TDO
TMS
TRACECLK
TRACEPKT0
TRACEPKT1
TRACEPKT2
TRACEPKT3
TRACEPKT4
TRACEPKT5
TRACEPKT6
TRACEPKT7
TRACESYNC
TRIG_IN
TRSTn
TXON_PA
PA_MODE
DSR
MON_RXD
UART_BT_RX
RCV_P
EAR_SPK_N
BT_PCM_CLK
BT_PCM_SYNC
ANT_SEL3
BAT_ID
MIC_N
MIC_P
PIPESTAT0
PIPESTAT1
PIPESTAT2
PM_INT
_RESET
SD_DATA(13)
SD_DATA(8)
SD_DATA(14)
SD_DATA(9)
SD_DATA(15)
SD_ADD(0)
SD_ADD(1)
SD_ADD(2)
SD_ADD(3)
SD_DATA(2)
SD_ADD(4)
SD_ADD(5)
SD_ADD(6)
SD_ADD(7)
SD_ADD(8)
SD_DATA(3)
SD_DATA(4)
SD_ADD(9)
_NAND_CS
_BC0
_BC1
FCDP
_CAS
CKE
_RAM_CS
_RD
SDCLKO
_WR
RCV_N
CIF_D3 CIF_D4 CIF_D5 CIF_D6 CIF_D7
LCD_RESET
LCD_CSn
LCD_DATA(0)
BT_INT
LCD_WRn
USB_DAT_VP
UART_TX
SD_DATA(0)
SD_DATA(1)
SD_DATA(10)
SD_DATA(5)
SD_DATA(11)
SD_DATA(6)
SD_DATA(12)
SD_DATA(7)
_WP
RESOURCE_CTRL
BT_RESET_N
_RAS
SIM_CLK
SIM_IO
SIM_RST
CIF_D0 CIF_D1 CIF_D2
SDCLKO
_BC0
LDQS
FCDP
_BC1
UDQS
_CAS
_NAND_CS
SDCLKI
_RAM_CS
_RAS
_RD
_WR
_WR
NAND_IO(5)
NAND_IO(6)
NAND_IO(7)
NAND_IO(8)
NAND_IO(9)
NAND_IO(10)
NAND_IO(11)
NAND_IO(12)
NAND_IO(13)
NAND_IO(14)
NAND_IO(15)
SD_ADD(0)
BA0
BA1
CKE
SD_ADD(1)
SD_DATA(7)
SD_DATA(8)
SD_DATA(9)
SD_DATA(10)
SD_DATA(11)
SD_DATA(12)
SD_DATA(13)
SD_DATA(14)
SD_DATA(15)
NAND_IO(0:15)
NAND_IO(0)
NAND_IO(1)
NAND_IO(2)
NAND_IO(3)
NAND_IO(4)
SD_ADD(9)
SD_ADD(10)
SD_ADD(11)
SD_ADD(12)
SD_ADD(13)
SD_ADD(0)
SD_ADD(1)
SD_DATA(0:15)
SD_DATA(0)
SD_DATA(1)
SD_DATA(2)
SD_DATA(3)
SD_DATA(4)
SD_DATA(5)
SD_DATA(6)
RPWRON
DSR
UART_TX
UART_RX
SD_ADD(0:13)
SD_ADD(2)
SD_ADD(3)
SD_ADD(4)
SD_ADD(5)
SD_ADD(6)
SD_ADD(7)
SD_ADD(8)
TRACEPKT6
TRACEPKT7
TRACECLK
PIPESTAT0
PIPESTAT1
PIPESTAT2
TRACESYNC
A_TRSTn
A_TDI
A_TMS
A_RTCK
A_TDO
TRSTn
TDI
TMS
TCK
RTCK
TDO
EXTRSTn
TRIG_IN
TRACEPKT0
TRACEPKT1
TRACEPKT2
TRACEPKT3
TRACEPKT4
TRACEPKT5