LG GX200 - Page 34

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3.5.1 FEATURES
<Common>
‧ Operating Temperature : -25°C ~ 85°C
‧ Package : 107-ball FBGA Type - 10.5x13x1.4mmt,
0.80mm pitch
<NAND Flash>
‧ Voltage Supply : 2.5V ~ 2.9V
‧ Organization
- Memory Cell Array : (64M + 2M) x 8bits
- Data Register : (512 + 16) x 8bits
‧ Automatic Program and Erase
- Page Program : (512 + 16) x 8bits
- Block Erase : (16K + 512)Bytes
‧ Page Read Operation
- Page Size : (512 + 16)Bytes
- Random Access : 15μs(Max.)
- Serial Page Access : 42ns(Min.)
‧ Fast Write Cycle Time
- Program time : 200μs(Typ.)
- Block Erase Time : 2ms(Typ.)
‧ Command/Address/Data Multiplexed I/O Port
‧ Hardware Data Protection
- Program/Erase Lockout During Power Transitions
‧ Reliable CMOS Floating-Gate Technology
- Endurance : 100K Program/Erase Cycles (with 1bit/512Byte ECC)
- Data Retention : 10 Years
‧ Command Register Operation
‧ Unique ID for Copyright Protection
<Mobile SDRAM>
• VDD/VDDQ = 1.8V/1.8V
• LVCMOS compatible with multiplexed address.
• Four banks operation.
• MRS cycle with address key programs.
- CAS latency (1, 2 & 3).
- Burst length (1, 2, 4, 8 & Full page).
- Burst type (Sequential & Interleave).
• EMRS cycle with address key programs.
• All inputs are sampled at the positive going edge of the system
clock.
• Burst read single-bit write operation.
• Special Function Support.
- PASR (Partial Array Self Refresh).
- Internal TCSR (Temperature Compensated Self Refresh)
- DS (Driver Strength)
• DQM for masking.
• Auto refresh.
64ms refresh period (8K cycle).
Address configuration