Bank
Row
Column
16M x 16
BA0,BA1
A0 - A12
A0 - A8
3.5.2 GENERAL DESCRIPTION
The K5D12571CA is a Multi Chip Package Memory which combines 512Mbit NAND Flash
Memory and 256Mbit Mobile Synchronous Dynamic RAM.
Offered in 64Mx8bits, the NAND Flash is 512Mbit with spare 16Mbit capacity. The device is
offered in 2.7V Vcc. Its NAND cell provides the most cost-effective solutIon for the solid state
mass storage market. A program operation can be performed in typical 200μs on the 528-bytes
and an erase operation can be performed in typical 2ms on a 16K-bytes block. Data in the page
can be read out at 42ns cycle time per byte. The I/O pins serve as the ports for address and data
input/output as well as command input. The on-chip write control automates all program
and erase functions including pulse repetition, where required, and internal verification and
margining of data. Even the write-intensive systems can take advantage of the device′s
extended reliability of 100K program/erase cycles by providing ECC(Error Correcting Code) with
real time mapping-out algorithm. The device is an optimum solution for large nonvolatile storage
applications such as solid state file storage and other portable applications requiring
non-volatility.
The 256Mb Mobile SDRAM is 268,435,456 bits synchronous high data rate Dynamic RAM
organized as 4 x 4,194,304 words by 16 bits, fabricated with SAMSUNG’s high performance
CMOS technology. Synchronous design allows precise cycle control with the use of system clock
and I/O transactions are possible on every clock cycle. Range of operating frequencies,
programmable burst lengths and programmable latencies allow the same device to be useful for
a variety of high bandwidth and high performance memory system applications.
The K5D12571CA is suitable for use in data memory of mobile communication system to
reduce not only mount area but also power consumption. This device is available in 107-ball
FBGA Type.
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