Marantz SR5002N1B - Page 49

71
IC11 : HD64F2506
pin
No
Port Name Mode7 I/O use STBY Name
Port Setting
Note
Act. init
126 P30/TxD0 I/O,O SC I TXD
UART for RS232C, Flash WR
Pull UP
127 P77/TxD3 I/O,O SO O OSDDATA - -
FrontFL,Video(OSD),Y/C&Sepa,
4094,SAA,AK
128 P76/RxD3 I/O,I I I PULL DOWN
129 P75/TMO3/SCK3 I/O,I/O,I/O SC I OSDCLK - -
FrontFL,Video(OSD),Y/C&Sepa,
4094,SAA,AK
130 P74/TMO2/~MRES I/O,O O I _RSTFL L L Reset FL Driver
131 P73/TMO1 I/O,O I I _CEFL L L FL Driver Chip Select
132 P72/TMO0 I/O,O I I CDE_INT L H ADC(CODEC) OVER FLOW
133 P71/TMRI23/TMCI23 I/O,O,O O I RST_CODEC L H RESET CODEC
134 P70/TMRI01/TMCI01 I/O,O,O O I CLK_SW TC74VHC157 SEL
135 PG4 I/O O I _SCS L H DSP CHIP ENABLE
136 PG3 I/O O I _RSTDSP L L DSP
137 PG2 I/O O I _FCS L H DSP CHIP ENABLE
138 PG1/~IRQ7 I/O,I INT I RDS_CLK - - RDS Clock
139 PG0/~IRQ6 I/O,I INT I XM_IRQ - - XM_IRQ
140 PE0 I/O O I MONO H L Multi Mono(H)/Stereo(L)
141 PE1 I/O O I _CEEX L H P-Exp(Video)Sel A
142 PE2 I/O O I Y_OSD H L Y/C_OSD_IC_BYPASS
143 PE3 I/O O I CVBS_OSD H L CVBS_OSD_IC_BYPASS
144 PE4 I/O O I _CEOSD L H Video Circuit