Matrix PEL-8000 Series - Page 32

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Table 2 registers XRAM area definition:
name
address
wor
d
Attrib
utes
Description
CMD
0x0A00
1
W/R
Command register: low 8 effective, read and write
high 8 meaningless.
IFIX
0x0A01
2
W/R
Constant current register, double type
UFIX
0x0A03
2
W/R
Constant voltage register, double type
PFIX
0x0A05
2
W/R
Constant power register, double type
RFIX
0x0A07
2
W/R
Constant resistance register, double type
TMCCS
0x0A09
2
W/R
Current Soft-Start Rising Time Register, double
type
TMCVS
0x0A0B
2
W/R
Voltage Soft-Start Rising Time Register, double
type
UCCONSET
0x0A0D
2
W/R
Constant current load voltage register, double
type
UCCOFFSET
0x0A0F
2
W/R
Constant current unload voltage register, double
type
UCVONSET
0x0A11
2
W/R
Constant voltage load voltage register, double
type
UCVOFFSET
0x0A13
2
W/R
Constant voltage unload voltage register, double
type
UCPONSET
0x0A15
2
W/R
Constant power load voltage register, double
type
UCPOFFSET
0x0A17
2
W/R
Constant power unload voltage register, double
type
UCRONSET
0x0A19
2
W/R
Constant resistance load voltage register, double
type
UCROFFSET
0x0A1B
2
W/R
Constant resistance unload voltage register,
double type
UCCCV
0x0A1D
2
W/R
Constant current transfer voltage and voltage
registers, double type
UCRCV
0x0A1F
2
W/R
Constant resistance switch voltage and voltage
registers, double type
IA
0x0A21
2
W/R
Dynamic mode A phase current register, double
type
IB
0x0A23
2
W/R
Dynamic mode B phase current register, double
type
TMAWD
0x0A25
2
W/R
Dynamic mode A phase pulse width register,
double type
TMBWD
0x0A27
2
W/R
Dynamic mode B phase pulse width register,
double type
TMTRANRIS
0x0A29
2
W/R
Dynamic mode rising edge time register, double
type
TMTRANFAL
0x0A2B
2
W/R
Dynamic mode falling edge time register, double
type
MODETRAN
0x0A2D
1
W/R
Dynamic operating mode register, u16 type