45
cycles of CAS latency depends on the DRAM timing. We re-
commend that you leave this item at the default value.
Bank Interleave (Disabled)
Enable this item to increase memory speed. When enabled,
separate memory banks are set for odd and even addresses
and the next byte of memory can be accessed while the cur-
rent byte is being refreshed.
DRAM Command Rate (2T Command)
This item enables you to specify the waiting time for the CPU
to issue the next command after issuing the command to the
DDR memory. We recommend that you leave this item at the
default value.
Press <Esc> to return to the Advanced Chipset Features page.
AGP & P2P Bridge Control
Scroll to this item and press <Enter> to view the following
screen:
CMOS Setup Utility – Copyright (C) 1984 – 2001 Award Software
AGP & P2P Bridge Control
Item Help
AGP Aperture Size [64M]
AGP Mode [4X]
AGP Driving Control [Auto]
x AGP Driving Value DA
AGP Fast Write [Disabled]
AGP Master 1 WS Write [Disabled]
AGP Master WS Read [Disabled]
Menu Level
↑
↑↑
↑
↓
↓↓
↓
→
→→
→
←
←←
←
: Move Enter : Select +/-/PU/PD:Value: F10: Save ESC: Exit F1:General Help
F5:Previous Values F6:Fail-Safe Defaults F7:Optimized Defaults
AGP Aperture Size (64 MB)
This item defines the size of the aperture if you use an AGP
graphics adapter. The AGP aperture refers to a section of the
PCI memory address range used for graphics memory. We
recommend that you leave this item at the default value.
AGP Mode (4X)
This item allows you to enable or disable the caching of dis-
play data for the processor video memory. Enabling AGP-4X
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