Midland SYN-TECH 70-050 - Page 13

THEORY OF OPERATION
70-050/055
Busy Channel Lockout- and Time Out Timer
The Busy Channel Lockout function can be jumper selected by JP107 to
provide lockout on either carrier or CTCSS tone. The busy channel
signal, tone or carrier, is input to the microcomputer pin 28
(transmit inhibit). If the Busy Channel Lockout function is programmed
in E/PROM, transmit is inhibited while the busy channel signal is
present. An audio alert signal (if programmed) is generated when the
transmitter is keyed to indicate the channel busy condition. The time
out timer function is completely internal to the microcomputer. If the
continuous transmit, time exceeds the time limit, programmed in E/PROM,
the transmitter is disabled and an audio beep alerts the operator.
Power Supply
The 13.6 VDC input, is filtered by L256 and related components and
switched by K201 (trunk-mount models) or the unit on-off switch
(under-dash models). This filtered 13.6 VDC is supplied directly to
the PA driver and final stages and also to pin 2 of IC401, the main
voltage regulator. IC401 outputs a constant 8 VDC from pin 1 as well
as 8 VDC during receive from pin 8 and 8 VDC during transmit from pin
6. The receive/transmit switching signal is output from IC90I pin 13
through Q402 and Q403 to IC401 pin 5. Regulator IC402 (Tx board)
provides 5 VDC for the reference oscillator, synthesizer integrated
circuits and the E/PROM module. Regulator 1C303 (control panel or
control head) supplies 8 VDC for microphone bias and LED displays. The
microcomputer IC901 is supplied 5 VDC from zener diode D402, which is
powered by an unswitched 13.6 VDC source. This allows the
microcomputer to retain memory of the last selected channel as long as
power is connected to the radio. Other microcomputer functions are
disabled at unit turn-off, since power is removed from pin 19, the
standby control pin.
CTCSS Operation
The CTCSS option provides, under microcomputer control, encode and
decode of 35 standard EIA CTCSS tones. At each channel change and
transmit/receive transition, data corresponding to the selected
channel and mode is strobed on lines D0-D4 and latched in I Cl. IC1
outputs this data to IC3 for generation or detection of the correct
CTCSS tone. This data is also input to IC2, which outputs a high logic
level for encode/decode inhibit if all data lines are low (Aux Code
0). Encode inhibit is accomplished by holding IC3 pin 17 at. a high
level through D2. Decode is inhibited by biasing Q1 on through D4. As
long as the collector of Q1 is low, the base of Q261 (Receiver board)
is also held low. The collector of Q261, which is also connected to
the gate of the squelch FET, is then under control of the: noise
squelch signal from IC251 pin 13. If decode is not inhibited by Aux
Code 0 programming, control of the squelch FET is by IC251 pin 13 and
Q261. Q261 is controlled by Q260, which is in turn switched by Q2
(CTCSS board). Q2 is normally biased on by IC1 pin 12 but is switched
off when the correct tone is detected. The Monitor switch and
microphone hang-up box both control the status of Q1 and thus allow or
inhibit squelch gate control by the CTCSS board in the same manner as
Aux Code 0 programming.
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