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Mitsubishi Electric RD77GF8 - Cyclic Transmission Delay Time

Mitsubishi Electric RD77GF8
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170
APPX
Appendix 6 Processing Time
Cyclic transmission delay time
The following are the formulas to calculate cyclic transmission delay time.
Between the master station and an intelligent device station/remote device station
Master station (RX, RWr) Intelligent device station/remote device station (input)
The following time is shown:
The time between a signal input to the intelligent device station/remote device station and the CPU module device of the
master station turning on or off
The time between data input to the intelligent device station/remote device station and the data being stored in the CPU
module device of the master station
SM: Master station sequence scan time
CT: Inter-module synchronization cycle
n1: SM CT (Round up the calculated value to the nearest integer.)
Rio: Intelligent device station/remote device station processing time (Manual for the intelligent device station/remote
device station used)
Master station (RY, RWw) Intelligent device station/remote device station (output)
The following time is shown:
The time between the CPU module device of the master station turning on or off and the output of the intelligent device
station/remote device station being turning on or off
The time between data set to the CPU module device of the master station and the data output to the intelligent device
station/remote device station
SM: Master station sequence scan time
CT: Inter-module synchronization cycle
n2: CT SM (Round up the calculated value to the nearest integer.)
Rio: Intelligent device station/remote device station processing time (Manual for the intelligent device station/remote
device station used)
Calculation
value
Station-based block data assurance No station-based block data assurance
Normal value (SM 1) + (CT n1) + Rio (SM 1) + (CT 1) + Rio
Maximum
value
(SM 1) + (CT (n1 + 1)) + Rio (SM 1) + (CT 2) + Rio
Calculation
value
Station-based block data assurance No station-based block data assurance
Normal value (SM n2) + (CT n1) + Rio (SM 1) + (CT 1) + Rio
Maximum
value
(SM n2) + (CT 2) + Rio (SM 2) + (CT 2) + Rio

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