Frequency Synthesis
Theory of Operation 4-21
Loop frequency response is controlled by opamp feedback components R0712 and C0711. Opamp
U0701-3 compares the power control voltage PWR CNTL divided by resistors R0717 to R0719 with
the voltage limit setting VLTG LIMIT SET from the D/A converter (U0731-13) and keeps the control
voltage constant via Q0711 if the control voltage, reduced by the resistive divider (R0717 to R0719),
approaches the voltage of VLTG LIMIT SET (U0731-13).
Rise and fall time of the output power during transmitter keying and dekeying is controlled by the
comparator formed by opamp U0701-3.
During normal transmitter operation the voltage at U701-3 pin 13 is higher than the voltage at pin 12
causing the output at pin 14 being low and switching off transistor Q0711. Diode D0732 reduces the
bias voltage BIAS VLTG for low control voltage levels.
The temperature of the PA area is monitored by opamp U0701-1 using thermistor R5641 (located in
the PA section). If the temperature increases, the resistance of R5641 decreases, decreasing the
voltage PA TEMP. The inverting ampliÞer formed by U0701-1 ampliÞes the PA TEMP voltage and if
the voltage at opamp pin 1 approaches 4.6 V plus the voltage (ON) across D0721, U701-1 simulates
an increased power which in turn decreases the power control voltage until the voltage at U0701-4
pin 9 is 4.6V again. During normal transmitter operation the output voltage of opamp U701-1 pin 1 is
below 4.6V. Diode D5601 located in the PA section acts as protection against transients and wrong
polarity of the supply voltage.
10.0 Frequency Synthesis
The complete synthesizer subsystem consists of the Reference Oscillator (U7502), the Fractional-N
synthesizer (U7501), the Voltage Controlled Oscillator (Q5741, Q5751), the RX and TX buffer stages
(Q5771, Q5781) and the feedback ampliÞer (Q5791).
10.1 Reference Oscillator
The Reference Oscillator (Y5702) contains a temperature compensated crystal oscillator with a
frequency of 16.8 MHz. An analog to digital (A/D) converter internal to U5701 (FRAC-N) and
controlled by the microprocessor via serial interface (SRL) sets the voltage at the warp output of
U5701 pin 16 to set the frequency of the oscillator. The output of the oscillator (pin 2 of Y5702) is
applied to pin 14 (XTAL1) of U5701 via a RC series combination.
In applications were less frequency stability is required the oscillator inside U5701 is used along with
an external crystal Y5701, the varactor diode D5702, C5708, C5710 and R5704.
10.2 Fractional-N Synthesizer (U7501)
The FRAC-N synthesizer IC (U7501) consists of a pre-scaler, a programmable loop divider, control
divider logic, a phase detector, a charge pump, an A/D converter for low frequency digital
modulation, a balance attenuator to balance the high frequency analog modulation and low
frequency digital modulation, a 13V positive voltage multiplier, a serial interface for control, and
Þnally a super Þlter for the regulated 9.3 volts.
A voltage of 9.3V applied to the super Þlter input (U7501 pin 22) supplies an output voltage of 8.6
VDC at pin 18. It supplies the VCO (Q5741), VCO modulation bias circuit (via R5714) and the
synthesizer charge pump resistor network (R5723, R5724, R5726). The synthesizer supply voltage
is provided by the 5V regulator U5801.
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