Chapter 3
3-12
Advanced Chipset Features
DRAM Frequency
Use this item to configure the clock frequency of the installed DRAM. Settings
are: Auto, 200MHz, 266MHz.
Configure DRAM Timing by
This setting determines whether DRAM timing is controlled by the SPD (Serial
Presence Detect) EEPROM on the DRAM module. Setting to SPD enables
CAS# Latency, RAS# Precharge, RAS# to CAS# Delay, and Precharge Delay
automatically to be determined by BIOS based on the configurations on the
SPD. Selecting Manual allows users to configure these fields manually.
CAS# Latency
The field controls the CAS latency, which determines the timing delay
before SDRAM starts a read command after receiving it. Setting options:
2.5 Clocks, 2 Clocks. 2 Clocks increases system performance while 2.5
Clocks provides more stable system performance.
RAS# Precharge
This setting controls the number of cycles for Row Address Strobe (RAS)
Note: Change these settings only if you are familiar with the chipset.
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