• DI Sample Clock
• DI Start Trigger
• DO Sample Clock
• CTR n Internal Output
• Freq Out
• PFI
• Change Detection Event
• Analog Comparison Event
Not all timed counter operations require a sample clock. For example, a simple buffered pulse
width measurement latches in data on each edge of a pulse. For this measurement, the
measured signal determines when data is latched in. These operations are referred to as
implicit timed operations. However, many of the same measurements can be clocked at an
interval with a sample clock. These are referred to as sample clocked operations. The
following table shows the different options for the different measurements.
Table 20. Counter Timing Measurements
Measurement Implicit Timing Support Sample Clocked Timing
Support
Buffered Edge Count No Yes
Buffered Pulse Width Yes Yes
Buffered Pulse Yes Yes
Buffered Semi-Period Yes No
Buffered Frequency Yes Yes
Buffered Period Yes Yes
Buffered Position No Yes
Buffered Two-Signal Edge Separation Yes Yes
Counter Triggering
Counters support three different triggering actions:
• Arm Start Trigger—To begin any counter input or output function, you must first enable,
or arm, the counter. Software can arm a counter or configure counters to be armed on a
hardware signal. Software calls this hardware signal the Arm Start Trigger. Internally,
software routes the Arm Start Trigger to the Counter n HW Arm input of the counter.
For counter output operations, you can use it in addition to the start and pause triggers.
For counter input operations, you can use the arm start trigger to have start trigger-like
74 | ni.com | cRIO-904x User Manual
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