NXP Semiconductors UM10204 - Timing Requirements for the Bridge in a Mixed-Speed Bus System

UM10204 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
User manual Rev. 5 — 9 October 2012 45 of 64
NXP Semiconductors
UM10204
I
2
C-bus specification and user manual
5.3.8 Timing requirements for the bridge in a mixed-speed bus system
It can be seen from Figure 37 that the actions of the bridge at t
1
, t
H
and t
FS
must be so fast
that it does not affect the SDAH and SCLH lines. Furthermore the bridge must meet the
related timing requirements of the Fast-mode specification for the SDA and SCL lines.
Fig 37. A complete Hs-mode transfer in a mixed-speed bus system
mcs611
8-bit Master code 00001xxx
A
t
H
t
1
t
2
S
F/S mode
Hs-mode
If P then
F/S mode
If Sr (dotted lines)
then Hs-mode
16789
16789 67891
1 2 to 5
2 to 5
2 to 5
2 to 5
6789
SDAH
SCLH
SDA
SCL
SDAH
SCLH
SDA
SCL
t
H
t
FS
Sr Sr P
P
n × (8-bit DATA + A/A)
7-bit SLA
R/W A
= MCS current source pull-up
= Rp resistor pull-up