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Omron SYSMAC C60K

Omron SYSMAC C60K
225 pages
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Cat. No. W146-E1-5
Programmable Controllers
SYSMAC
C20K/C28K/C40K/C60K

Table of Contents

Other manuals for Omron SYSMAC C60K

Questions and Answers:

Omron SYSMAC C60K Specifications

General IconGeneral
ManufacturerOmron
ModelSYSMAC C60K
CategoryController
TypeProgrammable Logic Controller (PLC)
Input Voltage100-240V AC
I/O CapacityExpandable
Communication ProtocolsRS-232C, RS-422
Programming LanguageLadder Logic
Instruction SetBasic and advanced instructions
Power Supply100-240V AC
Operating Temperature0 to 55°C
Humidity10% to 90% RH (non-condensing)
Vibration Resistance10 to 57 Hz, 0.075mm amplitude
Storage Temperature-20 to 75°C (-4 to 167°F)

Summary

PRECAUTIONS

Intended Audience

Defines the target audience and required knowledge for using the manual.

General Precautions

General guidelines for operating the product safely and consulting OMRON for specific applications.

Safety Precautions

Specific warnings about handling Units with power supplied and avoiding electric shock.

Operating Environment Precautions

Lists locations to avoid for operating the control system due to environmental factors.

SECTION 1 Background

1-1 Introduction

Explains the basic concept of a PC and the purpose of the manual.

1-2 Relay Circuits: The Roots of PC Logic

Discusses the historical relation of PCs to relay logic and programming terminology.

1-3 PC Terminology

Defines key terms like PC, Input/Output devices, and Control System for understanding PC operation.

1-4 OMRON Product Terminology

Explains OMRON's product naming conventions, specifically "Unit" and I/O Units.

1-5 Overview of PC Operation

Outlines the basic steps involved in programming and operating a K-type PC system.

1-6 Peripheral Devices

Lists and describes peripheral devices used for PC programming, monitoring, and interfacing.

1-7 Available Manuals

Lists other manuals required for programming and operating K-type PCs, including model numbers.

SECTION 2 Hardware Considerations

2-1 Introduction

Provides information on hardware aspects relevant to programming and software operation.

2-2 Indicators

Explains CPU indicators that provide visual information on PC operation and errors.

2-3 PC Configuration

Details the components that make up a K-type PC system and the role of expansion units.

SECTION 3 Memory Areas

3-1 Introduction

Explains the various memory areas for data management and programming.

3-2 Data Area Structure

Details how data areas are organized, including acronyms, addresses, and bit/word designations.

3-3 Internal Relay (IR) Area

Describes the use of the IR area for I/O points and work bits, and its structure.

3-4 Special Relay (SR) Area

Covers SR area flags and control bits for system monitoring and error signaling.

3-5 Data Memory (DM) Area

Explains the DM area for internal data storage and manipulation, accessible only by word.

3-6 Holding Relay (HR) Area

Describes the HR area for storing data that retains status during power interruptions.

3-7 TimerCounter (TC) Area

Explains the TC area for programming timers and counters and accessing their values and flags.

3-8 Temporary Relay (TR) Area

Details the TR area bits used for branching in ladder diagrams and preserving execution conditions.

SECTION 4 Writing and Inputting the Program

4-1 Introduction

Explains converting ladder diagrams to mnemonic code and basic programming steps.

4-2 Instruction Terminology

Defines terminology related to ladder diagram programming instructions and conditions.

4-3 The Ladder Diagram

Explains the structure and components of a ladder diagram, including bus bars and instruction lines.

4-4 The Programming Console

Describes the Programming Console, its connection, and modes of operation.

4-5 Preparation for Operation

Outlines procedures for initial setup, including password entry and memory clearing.

4-6 Inputting, Modifying, and Checking the Program

Covers procedures for entering, modifying, and checking programs using mnemonic code.

4-7 Controlling Bit Status

Explains instructions like OUT, OUT NOT, DIFU, DIFD, and KEEP for controlling individual bit status.

4-8 Work Bits (Internal Relays)

Details the use of work bits for simplifying programming and creating execution conditions.

4-9 Programming Precautions

Provides guidelines for drawing clear ladder diagrams and avoiding common programming pitfalls.

4-10 Program Execution

Explains how the CPU cycles through the program and executes instructions in order.

SECTION 5 Instruction Set

5-1 Introduction

Introduces the instruction set for programming complex control processes.

5-2 Notation

Explains the use of mnemonics and function codes for referring to instructions.

5-3 Instruction Format

Details the structure of instructions, including operands, definers, and instruction words.

5-4 Data Areas, Definer Values, and Flags

Explains data areas, definers, and flags affected by instruction execution.

5-5 Ladder Diagram Instructions

Covers instructions like LOAD, AND, OR, AND LOAD, OR LOAD used in ladder diagrams.

5-6 Bit Control Instructions

Introduces instructions for controlling individual bit status like OUT, DIFU, DIFD, and KEEP.

5-7 INTERLOCK and INTERLOCK CLEAR - IL(02) and ILC(03)

Details IL and ILC instructions for creating interlocks and controlling branching.

5-8 JUMP and JUMP END - JMP(04) and JME(05)

Explains JUMP and JUMP END instructions for skipping program sections conditionally.

5-9 END - END(01)

Specifies the END instruction as mandatory for program termination.

5-10 NO OPERATION - NOP(00)

Describes the NOP instruction, which performs no operation and moves to the next instruction.

5-11 Timer and Counter Instructions

Introduces instructions for timers (TIM, TIMH) and counters (CNT, CNTR, RDM, HDM).

5-12 Data Shifting

Introduces instructions for creating and manipulating shift registers like SFT, SFTR, and WSFT.

5-13 Data Movement

Covers instructions for moving data between different addresses in data areas.

5-14 DATA COMPARE - CMP(20)

Details the CMP instruction for comparing the contents of two words and outputting results to flags.

5-15 Data Conversion

Covers instructions for converting data between formats like BCD and binary.

5-16 BCD Calculations

Covers arithmetic operations on BCD data using instructions like ADD, SUB, MUL, DIV.

5-17 Subroutines

Introduces subroutines for separating tasks and reusing code blocks.

5-18 Step Instructions

Introduces STEP and SNXT instructions for setting up breakpoints and executing program sections as units.

5-19 Special Instructions

Covers instructions for special purposes like I/O refresh, cycle time setting, and comments.

SECTION 6 Program Execution Timing

6-1 Introduction

Explains the importance of timing in program execution and introduces cycle time and I/O response time.

6-2 Cycle Time

Discusses average cycle time display and the overall flow of CPU operation in a cycle.

6-3 Calculating Cycle Time

Provides examples and methods for calculating cycle time based on PC configuration and instructions.

6-4 Instruction Execution Times

Lists execution times for various instructions, including conditions affecting them.

6-5 IO Response Time

Explains the time taken for PC to output a control signal after receiving an input signal.

SECTION 7 Program Debugging and Execution

7-1 Introduction

Introduces procedures for inputting, debugging, monitoring, and controlling the PC.

7-2 Debugging

Covers the process of executing programs, eliminating errors, and testing isolated from the system.

7-3 Monitoring Operation and Modifying Data

Explains how to monitor data and modify values in data areas, timers, and counters.

7-4 Program Backup and Restore Operations

Outlines procedures for backing up and restoring program memory data using a cassette tape recorder.

SECTION 8 Troubleshooting

8-1 Introduction

Introduces self-diagnostic functions for identifying and correcting system abnormalities.

8-2 Reading and Clearing Errors and Messages

Explains how to display and clear system error messages using the Programming Console.

8-3 Error Messages

Classifies errors into non-fatal and fatal types and lists common error messages and their causes.

8-4 Error Flags

Lists SR area flags used in troubleshooting, such as Battery Alarm and Cycle Time Error flags.

Appendix A Standard Models

CPUs

Lists standard K-type CPU models with their power supply, inputs, outputs, model numbers, and standards.

IO Units

Lists standard K-type I/O Units with specifications, model numbers, and standards.

Special Units

Lists special units like Analog Timer, Host Link Unit, and I/O Link Unit with specifications.

Mounting Rail and Accessories

Lists mounting rails, plates, and spacers for PC installation.

Factory Intelligent Terminal (FIT)

Describes the FIT computer and its components for programming.

Graphic Programming Console (GPC)

Details the GPC, its display, memory cassette, and interface unit.

Peripheral Devices

Lists various peripheral devices like programming consoles, adapters, and cables with specifications.

Appendix B Programming Instructions and Execution Times

Instruction Execution Times

Lists execution times for various instructions, including conditions affecting them.

Ladder Diagram Instructions

Summarizes ladder diagram instructions like LOAD, AND, OR, AND LOAD, OR LOAD with symbols and operands.

Special Instructions

Summarizes special instructions like NOP, END, IL, ILC, JMP, JME, STEP, SFT, KEEP, CNTR.

Appendix D Error and Arithmetic Flag Operation

Appendix E Binary-Hexadecimal-Decimal Table

Appendix F Word Assignment Recording Sheets

IO Bits

Provides templates for recording I/O bit allocations and terminal assignments.

Work Bits

Provides templates for recording work bit usage and notes.

Data Storage

Provides templates for recording data storage areas, contents, and notes.

Timers and Counters

Provides templates for recording timer/counter addresses, set values, and notes.

Appendix G Program Coding Sheet

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