TX-SR506
IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS-7
Q282 : ES29LV160ET-70TG (16Mbit CMOS 3.0 Volt-only, Boot Sector Flash Memory)
BLOCK DIAGRAM
PIN LAYOUT
TERMINAL DESCRIPTION
OE#
Vcc
Vss
DQ0-DQ15(A-1)
WE#
RY/BY#
RESET#
A<0:19>
CE#
BYTE#
Data Latch/
Sense Amps
Timer/
Counter
Vcc Detector
Write
State
Machine
Command
Register
Analog Bias
Generator
Input/Output
Buffers
Chip Enable
Output Enable
Logic
Y-Decoder
Cell Array
X-Decoder
Y-Decoder
Address Latch
Sector Switches
48-Pin Standard TSOP
ES29LV160
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
A15
A14
A13
A12
A11
A10
A9
A8
A19
NC
WE#
RESET#
NC
NC
RY/BY#
A18
A17
A7
A6
A5
A4
A3
A2
A1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
A16
BYTE#
Vss
DQ15/A-1
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
Vcc
DQ11
DQ3
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
OE#
Vss
CE#
A0
Description
20 Addresses
15 Data Inputs/Outputs
DQ15 (Data Input/Output, Word Mode) / A-1 (LSB Address Input, Byte Mode)
Chip Enable
Output Enable
Write Enable
Hardware Reset Pin, Active Low
Selects 8-bit or 16-bit mode
Ready/Busy Output (N/A SO 044)
3.0 volt-only single power supply
Device Ground
Pin Not Connected Internally
Pin Name
A0-A19
DQ0-DQ14
DQ15/A-1
CE#
OE#
WE#
RESET#
BYTE#
RY/BY#
Vcc
Vss
NC
w
w
w
.
x
i
a
o
y
u
1
6
3
.
c
o
m
Q
Q
3
7
6
3
1
5
1
5
0
9
9
2
8
9
4
2
9
8
T
E
L
1
3
9
4
2
2
9
6
5
1
3
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
TEL 13942296513 QQ 376315150 892498299
http://www.xiaoyu163.com
http://www.xiaoyu163.com
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