Panasonic CQ-VD6503W - Page 15

Pin
No.
Port Description I/O Vol
(V)
11 NC NC(GND connection) I 0
12 NC NC(GND connection) I 0
13 IC/ Vpp Internal connection and
flash memory
programming mode
drawing in
- 0
14 X2 Crystal oscillator clock I 2.7
15 X1 Crystal oscillator clock I 2.4
16 REGC Regulator output
stability capacity
connection
- 2.5
17 VSS Grand potential for in - 0
18 EVSS Grand potential for
external
- 0
19 VDD Positive power supply
for in
- 4.9
20 EVDD Positive power supply
for external
- 4.9
21 SCL I2C bus clock output
for DAC
O 4.9
22 SDA I2C bus data output for
DAC
O 4.9
23 NC NC(OPEN) - -
24 NC NC(OPEN) - -
25 NC NC(OPEN) - -
26 NC NC(OPEN) - -
27 NC NC(OPEN) - -
28 NC NC(OPEN) - -
29 NC NC(OPEN) - -
30 NC NC(OPEN) - -
31 NC NC(OPEN) - -
32 NC NC(OPEN) - -
33 NC NC(OPEN) - -
34 NC NC(OPEN) - -
35 NC NC(OPEN) - -
36 NC NC(OPEN) - -
37 NC NC(OPEN) - -
38 HD IN HD signal input I 4.4
39 VD IN PAL N/PALM judgment
VD signal input
I 4.7
40 NC NC(OPEN) - -
41 NC NC(OPEN) - -
42 NC NC(OPEN) - -
43 NC NC(OPEN) - -
44 NC NC(OPEN) - -
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