Boolean Non-ladder
Ladder Diagram
Address Instruction
10
P13 PICWT , DT 0 , K1 , K0
S1
D
Trigger
S2
R0
This instruction is a differential execution type
(P type) of instruction, and should be specified
with a “P” in front of the instruction number.
10
11
ST R 0
P 13 (PICWT)
DT 0
K1
K0
S1 Starting 16-bit area for storing source data
S2 32−bit equivalent constant or lower 16−bit area of 32−bit data for specifying
number of words to be write
D Starting address of F–ROM area for storing received data (for destination)
Operands
O
WX WY WR WL SV EV DT LD FL I K H
modifier
S1 N/A N/A N/A N/A N/A N/A A N/A N/A N/A N/A N/A N/A
S2 N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A A N/A N/A
D N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A A N/A N/A
Explanation of example
1 block (2,048 words) of data stored in data registers DT0 is transferred to block 0 in the F–ROM area when
execution condition (trigger) R0 turns on.
0
1
2
9
[S1] 0
F–ROM area
[D]
Address
(Block)
2048
4096
18432
Data register DT
[S2]
2,048 words
2,048 words
2,048 words
2,048 words
FPΣ/FP−X/FP0R
Data write to F–ROM
P13
Availability
FPΣ/FP−X/FP0R
(PICWT)
A: Available
N/A: Not Available
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