Boolean
Ladder Diagram
Address Instruction
10 F31 D* , DT 10, DT 20 , DT 30
S1
S2
R0
Trigger
D
10
11
ST R 0
F31 (D*)
DT 10
DT 20
DT 30
S1 32-bit equivalent constant or lower 16-bit area of 32-bit data (for multiplicand)
S2 32-bit equivalent constant or lower 16-bit area of 32-bit data (for multiplier)
D Lower 16-bit area of 64-bit data (for result)
Operands
modifier
S1 A A A A A A A A A A N/A A A A
S2 A A A A A A A A A A N/A A A A
D N/A A A A A A A A A N/A N/A N/A N/A A
(*1) This cannot be used with the FP0 and FP−e.
(*2) This cannot be used with the FP0, FP−e, FP0R, FPΣ, FP−X.
(*3) With the FP0R, FPΣ,FP−X, FP2, FP2SH, and FP10SH, this is I0 to IC.
(*4) With the FP0R, FPΣ,FP−X, FP2, FP2SH, and FP10SH, this is ID.
Explanation of example
Contents of
DT11
Contents of
DT20
Contents of
DT21
16 bits 16 bits
Contents of
DT10
Store to DT31 Store to DT30
16 bits 16 bits
16 bits 16 bits
Store to DT33 Store to DT32
16 bits 16 bits
The specified data area and the following data
area are handled together as 32−bit data.
← The 64 bits of multiplication result are stored in
order in DT30 to DT33 beginning from the lowest
16 bits.
F31
P31
(D*)
(PD*)
32-bit data multiplication
[(S1+1, S1) × (S2+1, S2) → (D+3, D+2, D+1, D)]
A: Available
N/A: Not Available
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