Panasonic FP-E - Page 349

High−level Instructions
3 − 85
Outline Adds 1 to 16-bit data.
For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction
“P35 (P+1)” is not available.
Program example
Ladder
Diagram
Boolean
Ladder Diagram
Address Instruction
10
F35 +1 , DT 0
Trigger
R0
D
10
11
ST R 0
F 35 (+1)
DT 0
D 16-bit area to be increased by 1
Operands
Operand
Relay Timer/Counter Register
Index
register
Constant
Inde
x
Operand
WX WY WR
WL
(*1)
SV EV DT
LD
(*1)
FL
(*2)
IX
(*3)
IY
(*4)
K H
Index
modifier
D N/A A A A A A A A A A A N/A N/A A
(*1) This cannot be used with the FP0 and FP−e.
(*2) This cannot be used with the FP0, FP−e, FP0R, FPΣ, FP−X.
(*3) With the FP0R, FPΣ,FP−X, FP2, FP2SH, and FP10SH, this is I0 to IC.
(*4) With the FP0R, FPΣ,FP−X, FP2, FP2SH, and FP10SH, this is ID.
Explanation of example
Adds 1 to the contents of data register DT0 when trigger R0 turns on.
0000000000001010
····
Bit position
·····
DT0
15
000
12
0
11
000
8
0
7
000
4
0
3
100
0
1
Original data [D]: K9
+1
·· ·
Bit position
·····
DT0
15 1211 8 7 4 3 0
Result [D]: K10
Description
Adds 1 to the 16-bit data specified by D. The result is stored in D.
Original data Result
(D) (D)+1
F35
P35
(P+1)
(+1)
16-bit data increment
[D + 1 → D]
A: Available
N/A: Not Available
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