High−level Instructions
3 − 113
Outline Multiplies two BCD data items that express 8-digit decimal numbers
(8-digit BCD H codes).
For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction
“P51 (PDB*)” is not available.
Program example
Boolean
Ladder Diagram
Address Instruction
10
F51 DB* , DT10 , DT20 , DT30
S1
D
Trigger
S2
R0
10
11
ST R 0
F51 (DB*)
DT 10
DT 20
DT 30
S1 8-digit BCD equivalent constant or lower 16-bit area for 8-digit BCD data (for
multiplicand)
S2 8-digit BCD equivalent constant or lower 16-bit area for 8-digit BCD data (for
multiplier)
D Lowest 16-bit area for 16-digit BCD data (for result)
Operands
Relay Timer/Counter Register
Index
register
Constant
Operand
WX WY WR
WL
(*
****
)
SV EV DT
LD
(*
****
)
FL
(*2)
IX
(*3)
IY K H
Index
modifier
S1 A A A A A A A A A A N/A A A A
S2 A A A A A A A A A A N/A A A A
D N/A A A A A A A A A N/A N/A N/A N/A A
(*1) This cannot be used with the FP0 and FP−e.
(*2) This cannot be used with the FP0, FP−e, FP0R, FPΣ, FP−X.
(*3) With the FP0R, FPΣ,FP−X, FP2, FP2SH, and FP10SH, this is I0 to IC.
F51
P51
(PDB*)
(DB
*)
8-digit BCD data multiplication
[(S1+1, S1) × (S2+1, S2) → (D+3, D+2, D+1, D)]
A: Available
N/A: Not Available
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