Panasonic FP-E - Page 387

High−level Instructions
3 − 123
Outline Subtracts 1 from BCD data that expresses a 4-digit decimal number
(4-digit BCD H code).
For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction
“P57 (PB−1)” is not available.
Program example
Ladder
Diagram
Boolean
Ladder Diagram
Address Instruction
10
F57 B−1 , DT 0
D
Trigger
R0
10
11
ST R 0
F57 (B−1)
DT 0
D 16-bit area for BCD data to be decreased by 1
Operands
Operand
Relay Timer/Counter Register
Index
register
Constant
Inde
x
Operand
WX WY WR
WL
(*1)
SV EV DT
LD
(*1)
FL
(*2)
IX
(*3)
IY
(*4)
K H
Index
modifier
D N/A A A A A A A A A A A N/A N/A A
(*1) This cannot be used with the FP0 and FP−e.
(*2) This cannot be used with the FP0, FP−e, FP0R, FPΣ, FP−X.
(*3) With the FP0R, FPΣ,FP−X, FP2, FP2SH, and FP10SH, this is I0 to IC.
(*4) With the FP0R, FPΣ,FP−X, FP2, FP2SH, and FP10SH, this is ID.
Explanation of example
Subtracts 1 from the contents of data register DT0 when trigger R0 turns on.
Original data [D]: H10 (BCD)
−1
Result [D]: H9 (BCD)
BCD H code
····
Bit position
·····
DT0
15
000
12
0
11
000
8
0
7
000
4
1
3
000
0
0
0010
BCD H code
····
Bit position
·····
DT0
15
000
12
0
11
000
8
0
7
000
4
0
3
100
0
1
0009
F57
P57
(PB−1)
(B−1)
4-digit BCD data decrement
[D − 1 → D]
A: Available
N/A: Not Available
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