Panasonic FP-E - Page 399

High−level Instructions
3 − 135
Outline Compares one 16-bit data item with the data band specified by two
other 16-bit data items and the comparison result is output to the
special internal relay.
For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction
“P62 (PWIN)” is not available.
Program example
Ladder
Diagram
Boolean
Ladder Diagram
Address Instruction
50
F62 WIN , DT10 , DT20 , DT 30
Trigger
58
61
64
R900A
R900B
R900C
S1
Y10
Y11
Y12
R0
R0
R0
R0
S2
S3
Lower limit value
Upper limit value
50
51
58
59
60
61
62
63
64
65
66
ST R 0
F62 (WIN)
DT 10
DT 20
DT 30
ST R 0
AN R 900A
OT Y 10
ST R 0
AN R 900B
OT Y 11
ST R 0
AN R 900C
OT Y 12
S1 16-bit equivalent constant or 16-bit area to be compared
S2 16-bit equivalent constant or 16-bit area for lower limit
S3 16-bit equivalent constant or 16-bit area for upper limit
Operands
Operand
Relay Timer/Counter Register
Index
register
Constant
Inde
x
Operand
WX WY WR
WL
(*1)
SV EV DT
LD
(*1)
FL
(*2)
IX
(*3)
IY
(*4)
K H
Index
modifier
S1 A A A A A A A A A A A A A A
S2 A A A A A A A A A A A A A A
S3 A A A A A A A A A A A A A A
(*1) This cannot be used with the FP0 and FP−e.
(*2) This cannot be used with the FP0, FP−e, FP0R, FPΣ, FP−X.
(*3) With the FP0R, FPΣ,FP−X, FP2, FP2SH, and FP10SH, this is I0 to IC.
(*4) With the FP0R, FPΣ,FP−X, FP2, FP2SH, and FP10SH, this is ID.
F62
P62
(PWIN)
(WIN)
16-bit data band comparison
A: Available
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