Panasonic FP-E - Page 458

High−level Instructions
3 − 194
Outline Takes complement of 2 in 16-bit data.
For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction
“P85 (PNEG)” is not available.
Program example
Ladder
Diagram
Boolean
Ladder Diagram
Address Instruction
10
F85 NEG , DT 0
D
Trigger
R20
10
11
ST R 20
F85 (NEG)
DT 0
D 16-bit area for storing original data and its two’s complement
Operands
Operand
Relay Timer/Counter Register
Index
register
Constant
Inde
x
Operand
WX WY WR
WL
(*1)
SV EV DT
LD
(*1)
FL
(*2)
IX
(*3)
IY
(*4)
K H
Index
modifier
D N/A A A A A A A A A A A N/A N/A A
(*1) This cannot be used with the FP0 and FP−e.
(*2) This cannot be used with the FP0, FP−e, FP0R, FPΣ, FP−X.
(*3) With the FP0R, FPΣ,FP−X, FP2, FP2SH, and FP10SH, this is I0 to IC.
(*4) With the FP0R, FPΣ,FP−X, FP2, FP2SH, and FP10SH, this is ID.
Explanation of example
Takes two’s complement of data register DT0 when trigger R20 turns on.
····
Bit position
·····
DT0
15
11
12
1
11
1
87
1
43
01
0
1
Destination
R20: on
Destination
Decimal data
····
Bit position
·····
DT0
15
00
12
0
11
0
87
0
43
0
0
1
Decimal data
100000000
K3
11111111
K−3
F85
P85
(PNEG)
(NEG)
16-bit data complement of 2
A: Available
N/A: Not Available
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