Panasonic FP-E - Page 494

High−level Instructions
3 − 230
Outline Shifts a specified number of bits to the right in bit units.
For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction
“P100 (PSHR)” is not available.
Program example
Ladder
Diagram
Boolean
Ladder Diagram
Address Instruction
10
F100 SHR , DT 0 , K 4
D
n
Trigger
R0
10
11
ST R 0
F100 (SHR)
DT 0
K4
D 16-bit area to be shifted to the right
n 16-bit equivalent constant or 16-bit area (specifies number of shifted bits)
Operands
Operand
Relay Timer/Counter Register
Index
register
Constant
Inde
x
Operand
WX WY WR
WL
(*1)
SV EV DT
LD
(*1)
FL
(*2)
IX
(*3)
IY
(*4)
K H
Index
modifier
D N/A A A A A A A A A A A N/A N/A A
n A A A A A A A A A A A A A A
(*1) This cannot be used with the FP0 and FP−e.
(*2) This cannot be used with the FP0, FP−e, FP0R, FPΣ, FP−X.
(*3) With the FP0R, FPΣ,FP−X, FP2, FP2SH, and FP10SH, this is I0 to IC.
(*4) With the FP0R, FPΣ,FP−X, FP2, FP2SH, and FP10SH, this is ID.
Explanation of example
Shifts 4 bits in data register DT0 to the right when trigger R0 turns on.
The data in bit position 3 is transferred to special internal relay R9009 (carry flag).
00 01 11 10
·
·
··
Bit position
·····
DT0
15
101
12
0
11
011
8
0
7
110
4
0
3
101
0
1
R0: on
·
·
··
Bit position
·····
DT0
15
0
12
0
11
1
8
0
7
0
4
0
3
1
0
0
In this case, the higher 4 bits
of DT0 are filled with 0s.
The data in bit position 3 is
transferred to R9009 (carry flag).
F100
P100
(PSHR)
(SHR)
Right shift of multiple bits (n bits) in a 16−bit data
A: Available
N/A: Not Available
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