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Panasonic FP-E - Page 528

Panasonic FP-E
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High−level Instructions
3 − 264
Precautions when using this instruction
If data is received which exceeds the capacity of the buffer, an operation error will occur.
Example: If the writing pointer is at the end of the FIFO buffer
K101
K100
0
DT0
DT1
DT2
DT3
DT4
DT6
0
1
2
3
DT7
4▲
K5
K4
K101
K102
K103
4
DT5
0
DT0
DT1
DT2
▲DT3
DT4
DT6
0▲
1
2
3
DT7
4
K5
K5
K100
K102
K103
0
DT5
Execution of F117 (FIFW) instruction
Writing pointer shifts
WR0
Number of stored data
Writing pointer
K104
K104
Reading
pointer ▲
Writing
When the F117 (FIFW) instruction is executed, after data is
written to the final address (4) in the buffer, the writing pointer
becomes the first address (0).
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