Panasonic FP-E - Page 538

High−level Instructions
3 − 274
Outline Rotates a specified number of bits in specified 16-bit data to the right.
For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction
“P120 (PROR)” is not available.
Program example
Ladder
Diagram
Boolean
Ladder Diagram
Address Instruction
10
F120 ROR , DT 0 , K 4
D
n
Trigger
R0
10
11
ST R 0
F120 (ROR)
DT 0
K4
D 16-bit area
n 16-bit equivalent constant or 16-bit area to specify number of bits to be rotated
Operands
Operand
Relay Timer/Counter Register
Index
register
Constant
Inde
x
Operand
WX WY WR
WL
(*1)
SV EV DT
LD
(*1)
FL
(*2)
IX
(*3)
IY
(*4)
K H
Index
modifier
D N/A A A A A A A A A A A N/A N/A A
n A A A A A A A A A A A A A A
(*1) This cannot be used with the FP0 and FP−e.
(*2) This cannot be used with the FP0, FP−e, FP0R, FPΣ, FP−X.
(*3) With the FP0R, FPΣ,FP−X, FP2, FP2SH, and FP10SH, this is I0 to IC.
(*4) With the FP0R, FPΣ,FP−X, FP2, FP2SH, and FP10SH, this is ID.
Explanation of example
Rotates 4 bits in data register DT0 to the right when trigger R0 turns on.
10 00 01 01
·· ·
Bit position
·····
DT0
15
000
12
1
11
001
8
0
7
001
4
1
3
010
0
0
R0: on
Bit position
DT0
15
0
12
0
11
0
8
1
7
0
4
0
3
0
0
1
0
Special internal relay
R9009 (carry flag)
Data in bit position 3
·· ·· ·· ··
F120
P120
(PROR)
(ROR)
16-bit data right rotation
A: Available
N/A: Not Available
Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com