Panasonic SA-PM65MD - Page 50

Pin
No.
Mark I/O Function
1 BCLK O Bit Clock Output for
Serial Data
2 LRCK O L/P Clock Signal Output
3 SRDATA O Serial Data Output
4 DVDD1 I Power Supply Input (for
Digital Circuit)
5 DVSS1 I Ground (for Digital
Circuit)
6 TX O
Digital Audio Interface
Signal Output
(Latches Data at first
Transistion)
7 MCLK I Microprocessor
Command Clock Signal
Input
8 MDATA I Microprocessor
Command Data Signal
Input
9 MLD I Microprocessor
Command Load Signal
Input
10 SENSE I
Sense Signal Output
(OFT, FESL, MAGEND,
NAJEND, POSAD, SFG)
(Not Used, Open)
11 /FLOCK O
Focus Servo Feeding
Signal Output
(“L”: Feed)
12 /TLOCK O
Tracking Servo
Feeding Signal Output
(“L”:Feed)
13 BLKCK O
Sub-Code Block Clocl
Signal Output
(fBLKCK = 75Hz during
Normal Playback)
14 SQCK I External Clock Signal
Input for Sub-Code Q
Resistor)
15 SUBQ O Sub-Code Q Code
Output
16 DMUTE I Muting Input (“H”:
Mute)
17 STAT O
Status Signal Output
(CRC, CUE, CLVS,
TTSTVP, FCLV, SQCK)
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