Philips 32PFL4664/F7 - Page 48

9-8
3. Digital Signal Process Block Diagram
DIGITAL MAIN CBA UNIT
IC3101 (DIGITAL SIGNAL PROCESS)
DIGITAL SIGNAL PROCESS
HDMI-IN1
JK3002
DATA0(+) DATA0(-) DATA1(+) DATA1(-) DATA2(+) DATA2(-) HDMI-DATA HDMI-CLOCK
7 9 4 6 1 3
10 12 16 15
7 9 4 6 1 3
10 12 16 15
JK3001
CLOCK(+) CLOCK(-)
AUDIO DECODER
HDMI I/F
TO VIDEO/AUDIO BLOCK DIAGRAM
VIDEO DECODER
VIDEO SIGNAL
AUDIO SIGNAL
A/D CONVERTER
SW
CVBS-VIDEO-IN
DEMODULATOR /MPEG DECODER
AUDIO I/F
DIF-OUT1 DIF-OUT2 IF-AGC
IF-AGC
I2S-OUT-WS I2S-OUT-BCK
SPDIF
CVBS-AUDIO(L)-IN CVBS-AUDIO(R)-IN
DATA0(+) DATA0(-) DATA1(+) DATA1(-) DATA2(+) DATA2(-) HDMI-DATA HDMI-CLOCK CLOCK(+) CLOCK(-)
K6
J20 J21
R3
P2
R18
D2 D1
E2 E3
F2 F3
D3 C1
E5 E4
W2
W1
U4
LCD PANEL ASSEMBLY
HDMI-IN2
HDMI SW
MEMORY I/F
DATA(0-7)
IC3102
(NAND FLASH MEMORY)
NAND-AD(0-7)
ADDRESS
IC3401
(DDR3 SDRAM)
A(0-14)
G2 G1
H2 H3
J2 J3
G3
F1 F6 F5
CN3901
LVDS TX
V19
T20
T21
R20 R19 U20 U19
T19
R21
V20
25 24 19 18 16 15 13 12
RX3(+) RX3(-) RX2(+) RX2(-) RX1(+) RX1(-) RX0(+) RX0(-)
22 21
RXCLK(+) RXCLK(-)
I2S-OUT-MCK
K19
I2S-OUT-SD
J19
DQU(0-7),DQL(0-7)
DATA
PL19.00BBLD