Philips 32PFL5615D/7 - Page 106

EN 106Q552.1L LA 10.
Circuit Diagrams and PWB Layouts
2010-Dec-29
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div. table
PNX85500 Control
18770_834_100330.eps
100330
PNX85500 Control
B01E B01E
2010-02-16
4
8204 000 8994
TUNER, HDMI & CI
D
C
S
W
HOLD
VSS
Q
VCC
SCL
ADR
0
1
2 SDA
WC
DEBUG
IF53 B3
IF54 C3
DEBUG / RS232 INTERFACE
SCL
FOR
FF29 C4
FF55 E3
FF56 E3
SHIFTED
UP
FF66 F4
IF50 B3
IF51 B1
IF52 B3
3F63 E5
3F64 F5
3F65 F5
IF55 C6
IF56 C7
IF57 C7
IF58 D2
IF59 E1
IF61 C4
IF62 C4
7F54-2 C7
7F58 D1
9CH0 C7
FF04 C4
DEBUG ONLY
SDA
USE ONLY
1F52 D8
FF57 E2
FF58 C7
FF61 D4
FF62 D7
FF63 E4
FF64 F7
FF65 F4
3F58 E1
3F59 E3
3F60 E3
3F62 D5
123 4567
A
B
C
D
E
F
A
3F66 B7
3F67 B6
3F68 C7
3F69 D7
7F52 B2
7F53 B7
7F54-1 C7
D
E
F
1F51 F8
8 9
LEVEL
MAIN NVM
B
C
2F52 B1
2F53 D6
2F58 D2
3F51 B1
3F52 B3
3F53 C6
3F54 D7
123 45678 9
100R
3F62
3F64
100R
+5V
+3V3-STANDBY
84
3
FF61
Φ
512K
FLASH
M25P05-AVMN6
7F52
6
5
7
2
1
3F68
47K
RES
FF58
100R
3F59
IF61
RES
3F69
FF04
10K
7F53
PDTA114EU
RES
RES
1K0
3F54
FF66
FF57
IF50
RES
2F52
100n
IF55
+3V3
IF56
IF52
RES
+3V3-STANDBY
+3V3
100n
2F58
IF54
RES
2
6
1
FF65
BC847BPN(COL)
7F54-1
6
5
84
7
7F58
EEPROM
Φ
(8K × 8)
1
2
3
RES
5
3
4
BC847BPN(COL)
7F54-2
67
FF62
1F51
1
2
3
4
5
10K
3F58
RES
9CH0
IF51
2F53
1u0
RES
IF57
+3V3-STANDBY
FF63
FF56
100R
3F63
FF55
3F52
10K
FF29
IF58
3F65
100R
IF62
IF59
+3V3
FF64
100R
3F60
10K
3F51
2
3
4
5
1F52
1
+3V3
3F53
10K
IF53
3F66
10K
+3V3-STANDBY
RES
RES
3F67
10K
BOOST-PWM
BACKLIGHT-BOOST
SDM
SPI-PROG
RESET-STBYn
SPI-PROG
SDA-UP-MIPS
SCL-UP-MIPS
SCL-SSB
SDA-SSB
TXD-UP
RXD-UP
PNX-SPI-CLK
PNX-SPI-SDO
PNX-SPI-CSBn
PNX-SPI-SDI
PNX-SPI-WPn