Philips 32PFL5615D/7 - Page 53

Circuit Descriptions
EN 53Q552.1L LA 7.
2010-Dec-29
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div. table
Figure 7-9 PNX85500 functional diagram
18770_241_100201.eps
100219
TS out/in for
TS input
CVBS, Y/C,
LVDS for
analog CVBS
SPDIF
Low-IF
SSIF, LR
HDMI
CI/CA
MPEG
PRIMARY
LVDS
VIDEO
SECONDARY
MEMORY
VIDEO
3D COMB
DIGITAL IF
AUDIO DEMOD
AUDIO IN
HDMI
SCALER,
AUDIO DSP
AUDIO DACS
AUDIO OUT
450 MHz
560 MHz
I
2
C
PWM
GPIO IR ADC UART I
2
C GPIO Flash
analog audio
I
2
S
SPDIF
SYSTEM
USB 2.0
PNX85500x
DVB-T/C
channel decoder
DVB
AV-PIP
SPI
MPEG/H.264
RECEIVER
(8051)
CONTROLLER
AND DECODE
DECODER
PCMCIA
RGB
PROCESSOR
SYSTEM
CONTROLLER
DECODER
VIDEO
24KEf CPU
MIPS32
x 8
AV-DSP
REDUCTION
AND NOISE
DE-INTERLACE
OUTPUT
VIDEO
SUB-PICTURE
ENCODER
OUTPUT
VIDEO
quad channel)
(single, dual or
flat panel display
DRAWING
ENGINE
DMA BLOCK
Motion-accurate
pixel processing
SD
Memory
Card
Ethernet
MAC