Philips 42PFL9664H/12 - Page 47

Circuit Descriptions
EN 47Q549.6E LA 7.
2009-May-29
Figure 7-8 PNX8543 video flow diagram
The Video Subsystem consist of the following blocks:
• Analogue Front-End (AFE) block
• Video and PC Capture (VPC/PC) pipe
• HDMI Receiver interface
• Memory-Based Video Processor MBVP)
• Video Composition Pipe (CPIPE)
• Memory Based Video Processor (MBVP) VO-1
• Memory Based Video Processor (MBVP) VO-2
• Video Composition Pipe (CPIPE)
• Dual Flat Panel Display-LVDS (FPD-LVDS)
• Digital Encoder (DENC)
• Digital Video VIP
• 2D graphics block.
7.5.2 Audio Subsystem
Refer to Figure 7-9
for the main audio interfaces for the
PNX8543 and the audio signal flow between blocks and
memory.
18440_203_090226.eps
090226
VMSP
HDMI_UIP
PC_RX
AFE
(ADC)
DAC
LVDS_BUF
LVDS_TX
CPIPE_
L2QTV
CPIPE_
L2VO
MCU-DDR
DMA BUS
DDR2-SDRAM
PNX8543x
VCP_
UIP
DENC
DAC
VCP_
WIFD
HDMI_
RX
MBVP_
L2VO2
MBVP_
L2QTV
MBVP_
L2VO1
A
A
GFX2
PIP
CVBS1/Y
monitor
main
CVBS2/C
monitor
HDMI
VCP/PC
LOW IF
CVBS
RGB
Dual HDMI
FPD-LVDS1
LCD panel
MUX
VCP_RX
2D_DE
VIP
(ITU-656)
PC_
UIP
GFX1
FPD-LVDS2
LCD panel
CVBS/Y
C
CAI
TS
TSDO
TSDI
CMD
PCMCIA
TSI
MSVD
DV (including
ITU-656)
YPbPr
VGA