Philips CDR770 - Reset & Clock Check

Service modes, repair tips and faultfinding trees
GB 22 CDR 3rd gen.5.
Figure 5-13
RESET & CLOCK CHECK
USE CDR MAIN BOARD CIRCUIT DIAGRAMS 4, 9 AND 10 AND CDR MAIN BOARD BOTTOM VIEW : RESET & CLOCK TESTPOINTS
OK
OK
OK
OK
OK
NOK
Switch on player,
exit stand by mode
MRESET high (3V3) testpoint R1
Check power part
Check reset devices 7704 and 7710
BE_RESET low testpoint R2
NOK
Check DASP (IC7701)
SYS_RESET display high (3V3) testpoint R3
NOK
Check DASP (IC7701)
SYS_RESET CD low testpoint R4
NOK
Check T7707
RESET SIGNALS OK
* FOR CDR775/776 ONLY
SRSTN high (3V3) testpoint R5
NOK
Check MACE (IC7270)
MAIN_CLOCK 33.8688MHz testpoint R6
OK
CLOCK SIGNALS OK
NOK
Check X-TAL 1707, IC7705, D6701, D6702
SYS_CLK_11B 11.2896MHz testpoint R7
NOK
Check DASP (IC7701), IC7708
SYS_CLK_8W 8.4672MHz testpoint R9
SYS_CLK_BE 8.4672MHz testpoint R9
OK
NOK
Check IC7706
OK
SYS_CLK_16W 16.9344MHz testpoint R8
OK
NOK
Check DASP (IC7701)
CL06532018_016.eps
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