Circuit-, IC Descriptions and List of Abbreviations
EN 166 DVDR880-890 /0X19.
DV Decoder
The AV-data will go from the FIFO to the NW700. The NW700
decodes the stream into video data in 656 format and audio
data in I2S format.
The microprocessor has the ability to read the status registers
of the NW700 through the FPGA. By reading these registers,
extra data from the DV stream, that is not decoded into audio
or video, can be sent to the digital board using pin TXD of the
serial interface. This data includes time stamp and some more.
Audio & Video Output
The audio I2S data are sent to audio DAC UDA1334. Analog
audio left and right signals are connected to the analog board.
The tristate buffer enables the digital video stream to the Video
Input Processor on the digital board when the DV source is
selected.
The clock delay synchronizes the AV clock with the AV data at
the output.
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