Philips DVDR890 - Clock

Circuit-, IC Descriptions and List of Abbreviations
EN 190 DVDR880-890 /0X19.
2001 Aug 01 6
MPEG-2 video and MPEG-audio/AC-3 audio encoder with multiplexer
SAA6752HS
5 BLOCK DIAGRAM
Fig.1 Block diagram.
SDRAM-INTERFACE
STREAM DOMAIN SCHEDULER
AUDIO
COMPRESSION
AUDIO
INTER
VIDEO
FRONT-END
RAM ROM
STREAM
MULTIPLEXER
OUTPUT
INTER
VIDEO
COMPRESSION
SAA6752HS
SYSTEM
CLOCK
REFERENCE
CLOCK
27 MHz
audio clock
I
2
C
GPIO
reset
digital
I
2
C-bus
MIPS
RAM
ROM TAP
PI-bus
video
input
digital
audio
input
external
MPEG
boundary scan
CPU
clock
host interrupt
output
SDRAM
16 bit 16 Mbit or 16 bit 64 Mbit
system
clock
reference
STATIC
MEM
DEBUG
ONLY
RESET
CONTROL
FACE
FACE
System Clock
Output