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Philips FW-D596/21M - Pt6311 Internal IC Diagram; Pt6311 Pin Description

Philips FW-D596/21M
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PT6311 INTERNAL IC DIAGRAM
PT6311 PIN DESCRIPTION
Serial 
Data 
interface
LED 
Driver
OSC
Timming 
Generator
Segment
Driver/
Grid
Driver/
Key Scan
Output
Dimming 
Circuit
Grid
Driver
Control
Genaral
Input
Register
Key Matrix
Memory
Genaral
Input
Register
SG1/KS1
SG2/KS2
SG3/KS3
SG4/KS4
SG5/KS5
SG6/KS6
SG7/KS7
SG8/KS8
SG9/KS9
SG10/KS10
SG11/KS11
SG12/KS12
SG13/GR16
SG14/GR15
SG15/GR14
SG16/GR13
SG17/GR12
SG18/GR11
SG19/GR10
SG20/GR9
GR1
GR2
GR3
GR4
GR5
GR6
GR7
GR8
VEEGNDVDDK1
LED 5
LED 4
LED 1
SW 1
D
IN
DOUT
CLK
STB
V
DD
OSC
R
SW 2
SW 3
SW 4
LED 2
LED 3
K2K3K4
Pin Name I/O Description P i n N o.
SW1 to SW4 I General Purpose Input Pins 1 to 4
DOUT O
Data Output Pin (N-Cha nne l, Open -Drai n)
This pi n outp ut s serial da ta at the f alling edge
of the shift cloc k ( sta rti ng f rom the l ower bit).
5
DIN I
Data Inpu t P in
This pin inpu ts serial da ta at the rising edge of
the shift cloc k ( sta rti ng f rom the l ower bit)
6
NC - No Conne ct ion
CLK I
Cl ock Input Pin
This pi n reads serial da ta at the rising edge and
outputs data at the falling edge .
8
STB I
Serial Interface Strobe Pin
The data inpu t af te r the S TB ha s fal l en is
pr oc essed as a command .
When this pin is "HIGH", CLK is ignored.
9
K1 to K4 I
Key Data Input Pins
The da ta inpu tte d to thes e pi ns are latched at
the end of the di spl ay cycle.
10 to
13
VDD - L ogi c Power Suppl y
14,33,
45
SG1/K S1 to SG12/K S12 O
High -Vol ta ge Segment Output Pins
Also acts as the Ke y Sour ce
15 to
26
SG20/GR9 to SG19/G R10
SG18/GR11 to SG13/GR16
OHigh Vo l tage Segment/ Grid Outp ut Pins
36 to
35
32 to
27
VEE - Pull-Down Level 34
GR1 to GR8 O High-Voltage G rid Outp ut Pins
44 to
37
LE D1 to LE D5 O LE D Output Pin
50 to
46
GND- Ground Pin 51
OSC I
Oscillator Input Pin
A resistor is conne cted to this pin to determine
the oscillation frequency
52
7
5-2
5-2

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